Robert Lytton 7d2dd96694 XCore target: Refactor LR handling
We also narrow the liveness of FP & LR during the prologue to
reflect the actual usage of the registers.
I have been unable to construct a test to prove the previous live
range was too large.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198611 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-06 14:20:41 +00:00
..
2013-07-29 09:23:13 +00:00

To-do
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* Instruction encodings
* Tailcalls
* Investigate loop alignment
* Add builtins