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https://github.com/c64scene-ar/llvm-6502.git
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26d628d6ce
Summary: Currently fast-isel-abort will only abort for regular instructions, and just warn for function calls, terminators, function arguments. There is already fast-isel-abort-args but nothing for calls and terminators. This change turns the fast-isel-abort options into an integer option, so that multiple levels of strictness can be defined. This will help no being surprised when the "abort" option indeed does not abort, and enables the possibility to write test that verifies that no intrinsics are forgotten by fast-isel. Reviewers: resistor, echristo Subscribers: jfb, llvm-commits Differential Revision: http://reviews.llvm.org/D7941 From: Mehdi Amini <mehdi.amini@apple.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230775 91177308-0d34-0410-b5e6-96231b3b80d8
50 lines
1.3 KiB
LLVM
50 lines
1.3 KiB
LLVM
; RUN: llc < %s -fast-isel -fast-isel-abort=2 -verify-machineinstrs -mtriple=x86_64-apple-darwin10
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; Just make sure these don't abort when lowering the arguments.
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define i32 @t1(i32 %a, i32 %b, i32 %c) {
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entry:
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%add = add nsw i32 %b, %a
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%add1 = add nsw i32 %add, %c
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ret i32 %add1
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}
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define i64 @t2(i64 %a, i64 %b, i64 %c) {
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entry:
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%add = add nsw i64 %b, %a
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%add1 = add nsw i64 %add, %c
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ret i64 %add1
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}
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define i64 @t3(i32 %a, i64 %b, i32 %c) {
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entry:
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%conv = sext i32 %a to i64
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%add = add nsw i64 %conv, %b
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%conv1 = sext i32 %c to i64
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%add2 = add nsw i64 %add, %conv1
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ret i64 %add2
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}
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define float @t4(float %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h) {
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entry:
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%add1 = fadd float %a, %b
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%add2 = fadd float %c, %d
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%add3 = fadd float %e, %f
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%add4 = fadd float %g, %h
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%add5 = fadd float %add1, %add2
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%add6 = fadd float %add3, %add4
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%add7 = fadd float %add5, %add6
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ret float %add7
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}
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define double @t5(double %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h) {
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entry:
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%add1 = fadd double %a, %b
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%add2 = fadd double %c, %d
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%add3 = fadd double %e, %f
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%add4 = fadd double %g, %h
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%add5 = fadd double %add1, %add2
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%add6 = fadd double %add3, %add4
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%add7 = fadd double %add5, %add6
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ret double %add7
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}
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