Chris Lattner 4245f1d790 64-bit reg support should not be enabled by default, as support isn't complete. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23878 91177308-0d34-0410-b5e6-96231b3b80d8		2005-10-21 22:15:43 +00:00
..
Alpha	silence a release mode warning	2005-10-21 16:01:26 +00:00
CBackend	fix CBackend/2005-09-27-VolatileFuncPtr.ll	2005-09-27 20:52:44 +00:00
IA64	Don't generate operations that aren't yet supported	2005-10-21 01:52:45 +00:00
PowerPC	64-bit reg support should not be enabled by default, as support isn't complete.	2005-10-21 22:15:43 +00:00
Skeleton	CR registers are not used by this "target"	2005-09-30 06:43:58 +00:00
Sparc	silence some warnings	2005-10-05 17:15:09 +00:00
SparcV8	silence some warnings	2005-10-05 17:15:09 +00:00
SparcV9	This fixes PR638:	2005-10-19 20:07:15 +00:00
X86	Invert the TargetLowering flag that controls divide by consant expansion.	2005-10-21 00:02:42 +00:00
Makefile
MRegisterInfo.cpp	Rename MRegisterDesc -> TargetRegisterDesc for consistency	2005-09-30 17:49:27 +00:00
SubtargetFeature.cpp	Print:	2005-09-07 05:44:14 +00:00
Target.td	Plugin new subtarget backend into the build.	2005-10-21 19:05:19 +00:00
TargetData.cpp
TargetFrameInfo.cpp
TargetInstrInfo.cpp
TargetMachine.cpp	Remove the X86 and PowerPC Simple instruction selectors; their time has	2005-08-18 23:53:15 +00:00
TargetMachineRegistry.cpp	1. Use SubtargetFeatures in llc/lli.	2005-09-01 21:38:21 +00:00
TargetSchedInfo.cpp
TargetSchedule.td	Plugin new subtarget backend into the build.	2005-10-21 19:05:19 +00:00
TargetSelectionDAG.td	Use a literal to define ineg instead of immzero	2005-10-20 23:30:37 +00:00
TargetSubtarget.cpp