Tom Stellard 7e06370873 R600/SI: Custom lower i1 stores ... These are sometimes created by the shrink to boolean optimization in the globalopt pass. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203280 91177308-0d34-0410-b5e6-96231b3b80d8		2014-03-07 20:12:33 +00:00
..
AArch64	Replace PROLOG_LABEL with a new CFI_INSTRUCTION.	2014-03-07 06:08:31 +00:00
ARM	Replace PROLOG_LABEL with a new CFI_INSTRUCTION.	2014-03-07 06:08:31 +00:00
CPP
Generic
Hexagon	Fix broken CHECK lines	2014-02-16 07:31:05 +00:00
Inputs
Mips	[Mips] Testcase typo fix. No functionality change.	2014-03-05 22:54:56 +00:00
MSP430
NVPTX
PowerPC	Fixup PPC Darwin i1 argument handling	2014-03-06 00:45:19 +00:00
R600	R600/SI: Custom lower i1 stores	2014-03-07 20:12:33 +00:00
SPARC
SystemZ
Thumb
Thumb2
X86	CodeGenPrep: sink extends of illegal types into use block.	2014-03-07 11:04:30 +00:00
XCore	[XCore] Add support for the "m" inline asm constraint.	2014-03-06 16:37:48 +00:00