Files
llvm-6502/test/CodeGen/Mips
Daniel Sanders 1f4c755c2c [mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6
Summary:
Also tightened up the acceptable condition operand for these instructions
on MIPS-I to MIPS-III. Support for $fcc[1-7] was added in MIPS-IV. Prior
to that only $fcc0 is acceptable.

We currently don't optimize (BEQZ (NOT $a), $target) and similar. It's
probably best to do this in InstCombine.

Depends on D4111

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D4112

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210787 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 15:00:17 +00:00
..
2012-10-28 23:08:07 +00:00
2013-12-07 02:48:29 +00:00
2014-01-11 21:06:00 +00:00
2012-05-12 03:25:16 +00:00
2012-10-12 02:01:09 +00:00
2012-10-12 02:01:09 +00:00
2012-10-12 02:01:09 +00:00
2012-10-12 02:01:09 +00:00
2012-05-12 03:25:16 +00:00
2012-05-12 03:25:16 +00:00
2013-03-09 18:25:40 +00:00
2014-02-14 19:16:39 +00:00
2012-07-05 19:29:31 +00:00
2012-10-12 02:01:09 +00:00
2012-10-12 02:01:09 +00:00
2013-02-18 04:04:26 +00:00
2013-02-20 05:45:15 +00:00
2013-02-20 05:45:15 +00:00
2013-02-20 05:45:15 +00:00
2013-02-20 05:45:15 +00:00
2013-02-20 05:45:15 +00:00
2013-02-20 05:45:15 +00:00
2013-02-20 05:45:15 +00:00
2013-02-20 05:45:15 +00:00
2013-02-20 05:45:15 +00:00
2013-02-20 05:45:15 +00:00
2013-02-20 05:45:15 +00:00
2013-02-20 05:45:15 +00:00
2013-02-20 05:45:15 +00:00
2012-07-11 19:50:46 +00:00
2012-06-27 00:40:34 +00:00
2012-10-27 00:57:14 +00:00
2012-10-26 22:57:32 +00:00
2013-07-26 20:58:55 +00:00
2012-08-28 02:12:42 +00:00