llvm-6502/test/CodeGen
David Goodwin 7f98cac93a Thumb-2 tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74345 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 22:37:07 +00:00
..
Alpha
ARM ORN and BIC tests. 2009-06-26 16:20:06 +00:00
CBackend Fix an erroneous check for isFNeg; the FNeg case is handled 2009-06-04 23:43:29 +00:00
CellSPU Add some generic expansion logic for SMULO and UMULO. Fixes UMULO 2009-06-16 06:58:29 +00:00
CPP Fix code emission for conditional branches. 2009-05-04 19:10:38 +00:00
Generic Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
IA64
Mips Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
MSP430 Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
PowerPC Don't grep the -debug output. This isn't the way to test changes. 2009-06-25 21:59:32 +00:00
SPARC Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
Thumb We should run these tests as well. 2009-06-24 21:36:26 +00:00
Thumb2 Thumb-2 tests 2009-06-26 22:37:07 +00:00
X86 remove unwind info, add test for asmprinting of jump table labels with (%rip) 2009-06-26 22:16:49 +00:00
XCore Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00