llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-15 23:31:37 +00:00

History

Saleem Abdulrasool 8009754517 ARM IAS: support emitting constant values in target expressions

A 32-bit immediate value can be formed from a constant expression and loaded
into a register.  Add support to emit this into an object file.  Because this
value is a constant, a relocation must *not* be produced for it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199023 91177308-0d34-0410-b5e6-96231b3b80d8

2014-01-11 23:03:48 +00:00

AArch64

[AArch64][NEON] Added UXTL and UXTL2 instruction aliases

2014-01-08 21:02:13 +00:00

ARM

ARM IAS: support emitting constant values in target expressions

2014-01-11 23:03:48 +00:00

AsmParser

Mark the 64-bit x86 push/pop instructions as In64BitMode. Mark the corresponding 32-bit versions with the same encodings Not64BitMode. Remove hack from tablegen disassembler table emitter. Fix bad test.

2014-01-05 01:35:51 +00:00

COFF

Add the .secidx test I've forgotten to svn add in 197826