Craig Topper 82a644adf2 Remove A6/A7 opcode maps. They can all be handled with a TB map, opcode of 0xa6/0xa7, and adding MRM_C0/MRM_E0 forms. Removes 376K from the disassembler tables. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201641 91177308-0d34-0410-b5e6-96231b3b80d8		2014-02-19 05:34:21 +00:00
..
AArch64	[AArch64] Handle aliases of conditional branches without b.pred form.	2014-02-10 15:43:11 +00:00
ARM	Fix the arm assembler so that this malformed instruction:	2014-02-17 21:45:27 +00:00
AsmParser	MCAsmParser: support required parameters	2014-02-19 03:00:29 +00:00
COFF	Fix PR18381 - print a minimal diagnostic rather than assert on unresolved .secidx target	2014-01-30 21:13:05 +00:00
Disassembler	Remove A6/A7 opcode maps. They can all be handled with a TB map, opcode of 0xa6/0xa7, and adding MRM_C0/MRM_E0 forms. Removes 376K from the disassembler tables.	2014-02-19 05:34:21 +00:00
ELF	Add support for assigning to . in AsmParser.	2014-02-17 20:48:32 +00:00
MachO	Support DWARF discriminators in object streamer.	2014-02-14 19:27:53 +00:00
Markup
Mips	[mips][msa] Add DLSA instruction.	2014-02-10 12:05:17 +00:00
PowerPC	Convert another llc -filetype=obj test.	2013-10-28 22:17:19 +00:00
Sparc	[Sparc] Add support for parsing synthetic instruction 'mov'.	2014-02-07 09:06:52 +00:00
SystemZ	[SystemZ] Add MC support for interlocked-access 1 instructions	2013-12-24 15:14:05 +00:00
X86	AVX-512: Optimized BUILD_VECTOR pattern;	2014-02-11 07:25:59 +00:00