llvm-6502/test/CodeGen
Matthias Braun 82eb6198c8 Tests: Use CHECK-LABEL where possible
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192403 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 22:37:47 +00:00
..
AArch64 Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). 2013-10-10 17:00:52 +00:00
ARM Tests: Use CHECK-LABEL where possible 2013-10-10 22:37:47 +00:00
CPP
Generic Change objectsize intrinsic to accept different address spaces. 2013-10-07 18:06:48 +00:00
Hexagon
Inputs
Mips [mips] Do not generate INS/EXT nodes if target does not have support for 2013-10-09 23:36:17 +00:00
MSP430
NVPTX
PowerPC
R600 R600: Fix trunc i64 to i32 on SI 2013-10-10 18:04:16 +00:00
SPARC [Sparc] Disable tail call optimization for sparc64. 2013-10-09 12:50:39 +00:00
SystemZ
Thumb
Thumb2
X86 Disable function padding to get this test to pass on atom. 2013-10-10 12:46:23 +00:00
XCore