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			121 lines
		
	
	
		
			3.5 KiB
		
	
	
	
		
			TableGen
		
	
	
	
	
	
			
		
		
	
	
			121 lines
		
	
	
		
			3.5 KiB
		
	
	
	
		
			TableGen
		
	
	
	
	
	
| //===-- XCoreInstrFormats.td - XCore Instruction Formats ---*- tablegen -*-===//
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| //
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| //                     The LLVM Compiler Infrastructure
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| //
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| // This file is distributed under the University of Illinois Open Source
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| // License. See LICENSE.TXT for details.
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| //
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| //===----------------------------------------------------------------------===//
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| 
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| //===----------------------------------------------------------------------===//
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| // Instruction format superclass
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| //===----------------------------------------------------------------------===//
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| class InstXCore<dag outs, dag ins, string asmstr, list<dag> pattern>
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|     : Instruction {
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|   field bits<32> Inst;
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| 
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|   let Namespace = "XCore";
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|   dag OutOperandList = outs;
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|   dag InOperandList = ins;
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|   let AsmString   = asmstr;
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|   let Pattern = pattern;
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| }
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| 
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| // XCore pseudo instructions format
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| class PseudoInstXCore<dag outs, dag ins, string asmstr, list<dag> pattern>
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|    : InstXCore<outs, ins, asmstr, pattern>;
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| 
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| //===----------------------------------------------------------------------===//
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| // Instruction formats
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| //===----------------------------------------------------------------------===//
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| 
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| class _F3R<dag outs, dag ins, string asmstr, list<dag> pattern>
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|     : InstXCore<outs, ins, asmstr, pattern> {
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|   let Inst{31-0} = 0;
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| }
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| 
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| class _FL3R<dag outs, dag ins, string asmstr, list<dag> pattern>
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|     : InstXCore<outs, ins, asmstr, pattern> {
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|   let Inst{31-0} = 0;
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| }
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| 
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| class _F2RUS<dag outs, dag ins, string asmstr, list<dag> pattern>
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|     : InstXCore<outs, ins, asmstr, pattern> {
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|   let Inst{31-0} = 0;
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| }
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| 
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| class _FL2RUS<dag outs, dag ins, string asmstr, list<dag> pattern>
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|     : InstXCore<outs, ins, asmstr, pattern> {
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|   let Inst{31-0} = 0;
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| }
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| 
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| class _FRU6<dag outs, dag ins, string asmstr, list<dag> pattern>
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|     : InstXCore<outs, ins, asmstr, pattern> {
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|   let Inst{31-0} = 0;
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| }
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| 
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| class _FLRU6<dag outs, dag ins, string asmstr, list<dag> pattern>
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|     : InstXCore<outs, ins, asmstr, pattern> {
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|   let Inst{31-0} = 0;
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| }
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| 
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| class _FU6<dag outs, dag ins, string asmstr, list<dag> pattern>
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|     : InstXCore<outs, ins, asmstr, pattern> {
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|   let Inst{31-0} = 0;
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| }
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| 
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| class _FLU6<dag outs, dag ins, string asmstr, list<dag> pattern>
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|     : InstXCore<outs, ins, asmstr, pattern> {
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|   let Inst{31-0} = 0;
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| }
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| 
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| class _FU10<dag outs, dag ins, string asmstr, list<dag> pattern>
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|     : InstXCore<outs, ins, asmstr, pattern> {
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|   let Inst{31-0} = 0;
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| }
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| 
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| class _FLU10<dag outs, dag ins, string asmstr, list<dag> pattern>
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|     : InstXCore<outs, ins, asmstr, pattern> {
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|   let Inst{31-0} = 0;
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| }
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| 
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| class _F2R<dag outs, dag ins, string asmstr, list<dag> pattern>
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|     : InstXCore<outs, ins, asmstr, pattern> {
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|   let Inst{31-0} = 0;
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| }
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| 
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| class _FRUS<dag outs, dag ins, string asmstr, list<dag> pattern>
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|     : InstXCore<outs, ins, asmstr, pattern> {
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|   let Inst{31-0} = 0;
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| }
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| 
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| class _FL2R<dag outs, dag ins, string asmstr, list<dag> pattern>
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|     : InstXCore<outs, ins, asmstr, pattern> {
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|   let Inst{31-0} = 0;
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| }
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| 
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| class _F1R<dag outs, dag ins, string asmstr, list<dag> pattern>
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|     : InstXCore<outs, ins, asmstr, pattern> {
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|   let Inst{31-0} = 0;
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| }
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| 
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| class _F0R<dag outs, dag ins, string asmstr, list<dag> pattern>
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|     : InstXCore<outs, ins, asmstr, pattern> {
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|   let Inst{31-0} = 0;
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| }
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| 
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| class _L4R<dag outs, dag ins, string asmstr, list<dag> pattern>
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|     : InstXCore<outs, ins, asmstr, pattern> {
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|   let Inst{31-0} = 0;
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| }
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| 
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| class _L5R<dag outs, dag ins, string asmstr, list<dag> pattern>
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|     : InstXCore<outs, ins, asmstr, pattern> {
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|   let Inst{31-0} = 0;
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| }
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| 
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| class _L6R<dag outs, dag ins, string asmstr, list<dag> pattern>
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|     : InstXCore<outs, ins, asmstr, pattern> {
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|   let Inst{31-0} = 0;
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| }
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