Files
llvm-6502/test/MC/ARM
Tim Northover 8af3f965e0 ARM: do not relax Thumb1 -> Thumb2 if only Thumb1 is available.
After recognising that a certain narrow instruction might need a relocation to
be represented, we used to unconditionally relax it to a Thumb2 instruction to
permit this. Unfortunately, some CPUs (e.g. v6m) don't even have most Thumb2
instructions, so we end up emitting a completely invalid instruction.

Theoretically, ELF does have relocations for these situations; but they are
fairly unusable with such short ranges and the ABI document even says they're
documented "for completeness". So an error is probably better there too.

rdar://20391953

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234195 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-06 18:44:42 +00:00
..
2013-10-29 09:47:35 +00:00
2014-11-05 12:40:21 +00:00
2014-06-19 16:35:19 +00:00
2014-01-30 04:46:24 +00:00
2014-05-05 17:58:46 +00:00
2014-01-24 17:20:08 +00:00
2014-01-29 11:50:56 +00:00
2014-01-28 23:13:30 +00:00
2013-09-18 09:46:49 +00:00
2014-04-03 11:29:15 +00:00
2013-08-28 16:39:20 +00:00
2013-08-28 16:39:20 +00:00
2014-01-17 13:53:08 +00:00
2014-04-16 16:45:18 +00:00
2013-06-24 09:11:53 +00:00