David Goodwin 83b3593478 Currently there is a pattern for the thumb-2 MOV 16-bit immediate instruction. That instruction cannot write the flags so it should use T2I instead of T2sI. ...

Also, added a pattern for the thumb-2 MOV of shifted immediate since that can encode immediates not encodable by the 16-bit immediate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74288 91177308-0d34-0410-b5e6-96231b3b80d8

2009-06-26 16:10:07 +00:00

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Alpha

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ARM

Fix tests: Count -> count.

2009-06-26 07:05:57 +00:00

CBackend

Fix an erroneous check for isFNeg; the FNeg case is handled

2009-06-04 23:43:29 +00:00

CellSPU

Add some generic expansion logic for SMULO and UMULO. Fixes UMULO

2009-06-16 06:58:29 +00:00

CPP

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Generic

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

IA64

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Mips

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

MSP430

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

PowerPC

Don't grep the -debug output. This isn't the way to test changes.

2009-06-25 21:59:32 +00:00

SPARC

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00

Thumb

We should run these tests as well.

2009-06-24 21:36:26 +00:00

Thumb2

Currently there is a pattern for the thumb-2 MOV 16-bit immediate instruction. That instruction cannot write the flags so it should use T2I instead of T2sI.

2009-06-26 16:10:07 +00:00

X86

down with unwind info :)

2009-06-25 21:48:17 +00:00

XCore

Split the Add, Sub, and Mul instruction opcodes into separate

2009-06-04 22:49:04 +00:00