Evan Cheng 61230d18d2 Try schedule def + use closer whne Sethi-Ullman numbers are the same. ... e.g. t1 = op t2, c1 t3 = op t4, c2 and the following instructions are both ready. t2 = op c3 t4 = op c4 Then schedule t2 = op first. i.e. t4 = op c4 t2 = op c3 t1 = op t2, c1 t3 = op t4, c2 This creates more short live intervals which work better with the register allocator. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35089 91177308-0d34-0410-b5e6-96231b3b80d8		2007-03-13 23:25:11 +00:00
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SelectionDAG	Try schedule def + use closer whne Sethi-Ullman numbers are the same.	2007-03-13 23:25:11 +00:00
AsmPrinter.cpp	Small eye-candy: use asciz directive everywhere, where possible.	2007-03-06 19:25:02 +00:00
BranchFolding.cpp
DwarfWriter.cpp	Cleanup: make SetCounter an instance variable	2007-03-07 08:25:02 +00:00
ELFWriter.cpp
ELFWriter.h
IntrinsicLowering.cpp
LiveInterval.cpp
LiveIntervalAnalysis.cpp
LiveVariables.cpp	If a virtual register is already marked alive in this block, that means it is	2007-03-09 09:48:56 +00:00
LLVMTargetMachine.cpp	Now LoopStrengthReduce is a LoopPass.	2007-03-06 21:14:09 +00:00
MachineBasicBlock.cpp	Print preds / succs BB numbers.	2007-03-09 08:29:08 +00:00
MachineFunction.cpp
MachineInstr.cpp
MachineModuleInfo.cpp
MachinePassRegistry.cpp
MachOWriter.cpp
MachOWriter.h
Makefile
Passes.cpp
PHIElimination.cpp
PhysRegTracker.h
PrologEpilogInserter.cpp
RegAllocLinearScan.cpp
RegAllocLocal.cpp
RegAllocSimple.cpp
RegisterScavenging.cpp	Minor bug fix.	2007-03-06 21:58:15 +00:00
TwoAddressInstructionPass.cpp
UnreachableBlockElim.cpp
VirtRegMap.cpp
VirtRegMap.h