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6502/llvm-6502

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History

Silviu Baranga 169e9ba2b2 Added the missing bit definition for the 4th bit of the STR (post reg) instruction. It is now set to 0. The patch also sets the unpredictable mask for SEL and SXTB-type instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156609 91177308-0d34-0410-b5e6-96231b3b80d8

2012-05-11 09:28:27 +00:00

..

Added the missing bit definition for the 4th bit of the STR (post reg) instruction. It is now set to 0. The patch also sets the unpredictable mask for SEL and SXTB-type instructions.

2012-05-11 09:28:27 +00:00

Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu

2012-03-25 09:02:19 +00:00

Add disassembler to MIPS.

2012-04-17 18:03:21 +00:00

Missed some register numbers.

2012-04-27 12:21:46 +00:00