Nadav Rotem 87ffdbcb7b AVX2: The BLENDPW instruction selects between vectors of v16i16 using an i8 ...

immediate. We can't use it here because the shuffle code does not check that
the lower part of the word is identical to the upper part.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155440 91177308-0d34-0410-b5e6-96231b3b80d8

2012-04-24 11:27:53 +00:00

..

Analysis

Allow forward declarations to take a context. This helps the debugger

2012-04-23 19:00:11 +00:00

Archive

…

AsmParser

…

Bitcode

…

CodeGen

Look for the 'Is Simulated' module flag. This indicates that the program is compiled to run on a simulator.

2012-04-24 11:03:50 +00:00

DebugInfo

…

ExecutionEngine

Fix incorrect call of resolveRelocation() for ARM ELF stub relocations.

2012-04-17 20:10:16 +00:00

Linker

Add a flag to the struct type finder to collect only those types which have

2012-04-21 23:59:16 +00:00

MC

MC assembly parser handling for trailing comma in macro instantiation.

2012-04-16 21:18:49 +00:00

Object

Implement GDB integration for source level debugging of code JITed using

2012-04-16 22:12:58 +00:00

Support

Add a missing cpu subtype.

2012-04-23 22:41:39 +00:00

TableGen

Fix copy/paste-o.

2012-04-18 18:09:53 +00:00

Target

AVX2: The BLENDPW instruction selects between vectors of v16i16 using an i8

2012-04-24 11:27:53 +00:00

Transforms

Reapply r155136 after fixing PR12599.

2012-04-23 17:39:52 +00:00

VMCore

Cleanup whitespace.

2012-04-23 00:23:33 +00:00

CMakeLists.txt

…

LLVMBuild.txt

…

Makefile

…