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https://github.com/c64scene-ar/llvm-6502.git
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7b837d8c75
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
127 lines
4.3 KiB
C++
127 lines
4.3 KiB
C++
//===- ARM64MachineFuctionInfo.h - ARM64 machine function info --*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares ARM64-specific per-machine-function information.
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//
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//===----------------------------------------------------------------------===//
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#ifndef ARM64MACHINEFUNCTIONINFO_H
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#define ARM64MACHINEFUNCTIONINFO_H
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#include "llvm/ADT/SmallPtrSet.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/MC/MCLinkerOptimizationHint.h"
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namespace llvm {
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/// ARM64FunctionInfo - This class is derived from MachineFunctionInfo and
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/// contains private ARM64-specific information for each MachineFunction.
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class ARM64FunctionInfo : public MachineFunctionInfo {
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/// HasStackFrame - True if this function has a stack frame. Set by
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/// processFunctionBeforeCalleeSavedScan().
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bool HasStackFrame;
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/// \brief Amount of stack frame size, not including callee-saved registers.
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unsigned LocalStackSize;
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/// \brief Number of TLS accesses using the special (combinable)
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/// _TLS_MODULE_BASE_ symbol.
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unsigned NumLocalDynamicTLSAccesses;
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/// \brief FrameIndex for start of varargs area for arguments passed on the
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/// stack.
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int VarArgsStackIndex;
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/// \brief FrameIndex for start of varargs area for arguments passed in
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/// general purpose registers.
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int VarArgsGPRIndex;
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/// \brief Size of the varargs area for arguments passed in general purpose
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/// registers.
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unsigned VarArgsGPRSize;
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/// \brief FrameIndex for start of varargs area for arguments passed in
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/// floating-point registers.
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int VarArgsFPRIndex;
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/// \brief Size of the varargs area for arguments passed in floating-point
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/// registers.
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unsigned VarArgsFPRSize;
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public:
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ARM64FunctionInfo()
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: HasStackFrame(false), NumLocalDynamicTLSAccesses(0),
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VarArgsStackIndex(0), VarArgsGPRIndex(0), VarArgsGPRSize(0),
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VarArgsFPRIndex(0), VarArgsFPRSize(0) {}
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explicit ARM64FunctionInfo(MachineFunction &MF)
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: HasStackFrame(false), NumLocalDynamicTLSAccesses(0),
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VarArgsStackIndex(0), VarArgsGPRIndex(0), VarArgsGPRSize(0),
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VarArgsFPRIndex(0), VarArgsFPRSize(0) {
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(void)MF;
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}
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bool hasStackFrame() const { return HasStackFrame; }
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void setHasStackFrame(bool s) { HasStackFrame = s; }
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void setLocalStackSize(unsigned Size) { LocalStackSize = Size; }
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unsigned getLocalStackSize() const { return LocalStackSize; }
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void incNumLocalDynamicTLSAccesses() { ++NumLocalDynamicTLSAccesses; }
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unsigned getNumLocalDynamicTLSAccesses() const {
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return NumLocalDynamicTLSAccesses;
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}
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int getVarArgsStackIndex() const { return VarArgsStackIndex; }
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void setVarArgsStackIndex(int Index) { VarArgsStackIndex = Index; }
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int getVarArgsGPRIndex() const { return VarArgsGPRIndex; }
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void setVarArgsGPRIndex(int Index) { VarArgsGPRIndex = Index; }
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unsigned getVarArgsGPRSize() const { return VarArgsGPRSize; }
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void setVarArgsGPRSize(unsigned Size) { VarArgsGPRSize = Size; }
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int getVarArgsFPRIndex() const { return VarArgsFPRIndex; }
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void setVarArgsFPRIndex(int Index) { VarArgsFPRIndex = Index; }
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unsigned getVarArgsFPRSize() const { return VarArgsFPRSize; }
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void setVarArgsFPRSize(unsigned Size) { VarArgsFPRSize = Size; }
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typedef SmallPtrSet<const MachineInstr *, 16> SetOfInstructions;
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const SetOfInstructions &getLOHRelated() const { return LOHRelated; }
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// Shortcuts for LOH related types.
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typedef LOHDirective<const MachineInstr> MILOHDirective;
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typedef MILOHDirective::LOHArgs MILOHArgs;
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typedef LOHContainer<const MachineInstr> MILOHContainer;
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typedef MILOHContainer::LOHDirectives MILOHDirectives;
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const MILOHContainer &getLOHContainer() const { return LOHContainerSet; }
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/// Add a LOH directive of this @p Kind and this @p Args.
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void addLOHDirective(MCLOHType Kind, const MILOHArgs &Args) {
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LOHContainerSet.addDirective(Kind, Args);
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for (MILOHArgs::const_iterator It = Args.begin(), EndIt = Args.end();
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It != EndIt; ++It)
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LOHRelated.insert(*It);
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}
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private:
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// Hold the lists of LOHs.
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MILOHContainer LOHContainerSet;
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SetOfInstructions LOHRelated;
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};
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} // End llvm namespace
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#endif // ARM64MACHINEFUNCTIONINFO_H
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