Andrew Lenharth 892ade722a Sounds good, finish the intop conversion. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23843 91177308-0d34-0410-b5e6-96231b3b80d8

2005-10-20 14:42:48 +00:00

..

Alpha

Sounds good, finish the intop conversion.

2005-10-20 14:42:48 +00:00

CBackend

fix CBackend/2005-09-27-VolatileFuncPtr.ll

2005-09-27 20:52:44 +00:00

IA64

Fix CodeGen/Generic/bool-to-double.ll

2005-10-07 04:50:48 +00:00

PowerPC

Add some more patterns for i64 on ppc

2005-10-20 07:51:08 +00:00

Skeleton

CR registers are not used by this "target"

2005-09-30 06:43:58 +00:00

Sparc

silence some warnings

2005-10-05 17:15:09 +00:00

SparcV8

silence some warnings

2005-10-05 17:15:09 +00:00

SparcV9

This fixes PR638:

2005-10-19 20:07:15 +00:00

X86

Remove some dead code now that the dag combiner exists.

2005-10-15 22:08:02 +00:00

Makefile

…

MRegisterInfo.cpp

Rename MRegisterDesc -> TargetRegisterDesc for consistency

2005-09-30 17:49:27 +00:00

SubtargetFeature.cpp

Print:

2005-09-07 05:44:14 +00:00

Target.td

Added InstrSchedClass to each of the PowerPC Instructions.

2005-10-19 19:51:16 +00:00

TargetData.cpp

Update to use the new MathExtras.h support for log2 computation.

2005-08-02 19:26:06 +00:00

TargetFrameInfo.cpp

Eliminate all remaining tabs and trailing spaces.

2005-07-27 06:12:32 +00:00

TargetInstrInfo.cpp

…

TargetMachine.cpp

Remove the X86 and PowerPC Simple instruction selectors; their time has

2005-08-18 23:53:15 +00:00

TargetMachineRegistry.cpp

1. Use SubtargetFeatures in llc/lli.

2005-09-01 21:38:21 +00:00

TargetSchedInfo.cpp

…

TargetSchedule.td

Push processor descriptions to the top of target and add command line info.

2005-10-19 13:34:52 +00:00

TargetSelectionDAG.td

add the integer truncate/extension operations

2005-10-14 06:40:20 +00:00

TargetSubtarget.cpp

Eliminate all remaining tabs and trailing spaces.

2005-07-27 06:12:32 +00:00