Kevin Enderby 9c656450d6 Added the ParseInstruction() hook for target specific assembler directives so ... that things like .word can be parsed as target specific. Moved parsing .word out of AsmParser.cpp into X86AsmParser.cpp as it is 2 bytes on X86 and 4 bytes for other targets that support the .word directive. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81461 91177308-0d34-0410-b5e6-96231b3b80d8		2009-09-10 20:51:44 +00:00
..
SubtargetFeature.h	Switch SubtargetFeature off of ostreams	2009-08-23 21:41:43 +00:00
Target.td	Add 'isCodeGenOnly' bit to Instruction .td records.	2009-08-11 22:17:52 +00:00
TargetAsmParser.h	Added the ParseInstruction() hook for target specific assembler directives so	2009-09-10 20:51:44 +00:00
TargetCallingConv.td	Add 'Indirect' LocInfo class and use to pass __m128 on win64. Also minore fixes here and there (mostly __m64).	2009-08-03 08:13:56 +00:00
TargetData.h	Try again at privatizing the layout info map, with a rewritten patch.	2009-08-21 19:59:12 +00:00
TargetELFWriterInfo.h	- Remove custom handling of jumptables by the elf writter (this was	2009-08-05 06:57:03 +00:00
TargetFrameInfo.h	Tidy up #includes, deleting a bunch of unnecessary #includes.	2009-01-05 17:59:02 +00:00
TargetInstrDesc.h	1. Introduce a new TargetOperandInfo::getRegClass() helper method	2009-07-29 21:10:12 +00:00
TargetInstrInfo.h	rename TAI -> MAI, being careful not to make MAILJMP instructions :)	2009-08-22 21:43:10 +00:00
TargetInstrItineraries.h	Use the schedule itinerary operand use/def cycle information to adjust dependence edge latency for post-RA scheduling.	2009-08-19 16:08:58 +00:00
TargetIntrinsicInfo.h	Added support to have TableGen provide information if an intrinsic (core	2009-02-24 23:17:49 +00:00
TargetJITInfo.h	First patch in the direction of splitting MachineCodeEmitter in two subclasses:	2009-05-30 20:51:52 +00:00
TargetLowering.h	Retype from unsigned to CallingConv::ID accordingly. Approved by Bob Wilson.	2009-09-02 08:44:58 +00:00
TargetLoweringObjectFile.h	Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.	2009-08-22 20:48:53 +00:00
TargetMachine.h	Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.	2009-08-22 20:48:53 +00:00
TargetMachOWriterInfo.h
TargetOptions.h	SjLj based exception handling unwinding support. This patch is nasty, brutish	2009-08-11 00:09:57 +00:00
TargetRegisterInfo.h	Public and private corrections, warned about by icc (#304).	2009-09-06 08:55:57 +00:00
TargetRegistry.h	Added an abstract superclass, MCDisassembler, for	2009-09-09 22:49:13 +00:00
TargetSchedule.td	Extend the instruction itinerary model to include the ability to indicate the def and use cycle for each operand. This additional information is optional, so existing itineraries do not need to be changed.	2009-08-17 16:02:57 +00:00
TargetSelect.h	Add llvm::InitializeAllTargetInfos and llvm::InitializeAllAsmParsers.	2009-07-17 22:35:35 +00:00
TargetSelectionDAG.td	Add a new "SDTCisVec" SDTypeConstraint. This complements the vAny type.	2009-08-12 22:30:59 +00:00
TargetSubtarget.h	Use the schedule itinerary operand use/def cycle information to adjust dependence edge latency for post-RA scheduling.	2009-08-19 16:08:58 +00:00