Jack Carter ec3199f675 This patch tackles the problem of parsing Mips ...

register names in the standalone assembler llvm-mc.

Registers such as $A1 can represent either a 32 or
64 bit register based on the instruction using it.
In addition, based on the abi, $T0 can represent different
32 bit registers.


The problem is resolved by the Mips specific AsmParser 
td definitions changing to work together. Many cases of
RegisterClass parameters are now RegisterOperand.


Contributer: Vladimir Medic


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172284 91177308-0d34-0410-b5e6-96231b3b80d8

2013-01-12 01:03:14 +00:00

..

do_switch.ll

For mips64 switch statements in subroutines could generate

2012-08-22 00:49:30 +00:00

ef_frame.ll

This patch produces the correct pointer size

2013-01-08 18:53:20 +00:00

elf_basic.s

Pass the correct ELFOSABI enumeration to the MipsELFObjectWriter constructor

2012-07-02 20:04:43 +00:00

elf-bigendian.ll

Make the following changes in MipsAsmPrinter.cpp:

2012-05-12 00:48:43 +00:00

elf-N64.ll

Add option disable-mips-delay-filler. Turn on mips' delay slot filler by

2012-08-22 02:51:28 +00:00

elf-objdump.s

PR13013: ELF Type identification fails for MSB type ELF files.

2012-06-25 14:48:43 +00:00

elf-relsym.ll

…

elf-tls.ll

…

higher_highest.ll

Fix mips' long branch pass.

2012-08-28 03:03:05 +00:00

lea_64.ll

The Mips64InstrInfo.td definitions DynAlloc64 LEA_ADDiu64

2012-08-06 23:29:06 +00:00

lit.local.cfg

Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu

2012-03-25 09:02:19 +00:00

mips64-alu-instructions.s

This patch tackles the problem of parsing Mips

2013-01-12 01:03:14 +00:00

mips64-register-names.s

Add test cases for correct parsing of register names in 32- and 64-bit modes.

2012-10-11 12:42:49 +00:00

mips64extins.ll

The instruction DINS may be transformed into DINSU or DEXTM depending

2012-08-31 18:06:48 +00:00

mips64shift.ll

Some instructions are passed to the assembler to be

2012-08-28 19:07:39 +00:00

mips_directives.s

This patch is a partial implementation of mips .set assembler directive. Directive is defined as follows:

2012-10-04 02:29:46 +00:00

mips_gprel16.ll

This patch produces the correct addend value for

2013-01-08 19:01:28 +00:00

mips-alu-instructions.s

This patch tackles the problem of parsing Mips

2013-01-12 01:03:14 +00:00

mips-coprocessor-encodings.s

Expose move to/from coprocessor instructions in MIPS64 mode.

2012-10-11 10:21:34 +00:00

mips-expansions.s

Initial assembler implementation of Mips load address macro

2012-10-09 23:29:45 +00:00

mips-fpu-instructions.s

Adding support for instructions mfc0, mfc2, mtc0, mtc2

2012-10-06 01:17:37 +00:00

mips-jump-instructions.s

[mips] Fix encoding of BAL instruction. Also, fix assembler test case which

2012-12-21 23:13:59 +00:00

mips-memory-instructions.s

The Mips standalone assembler fpu instruction support.

2012-09-07 00:23:42 +00:00

mips-register-names.s

Add test cases for correct parsing of register names in 32- and 64-bit modes.

2012-10-11 12:42:49 +00:00

mips-relocations.s

Initial relocations test for the Mips standalone assembler.

2012-09-07 20:38:18 +00:00

multi-64bit-func.ll

Add option disable-mips-delay-filler. Turn on mips' delay slot filler by

2012-08-22 02:51:28 +00:00

pr11877.s

…

r-mips-got-disp.ll

The Mips specific relocation R_MIPS_GOT_DISP

2012-07-13 19:15:47 +00:00

sext_64_32.ll

[mips] Stop reserving register AT and use register scavenger when a scratch

2012-11-03 00:05:43 +00:00

sym-offset.ll

Insert instructions to the entry basic block which initializes the global

2012-05-12 00:17:17 +00:00

xgot.ll

Mips direct object xgot support

2012-11-21 23:38:59 +00:00