llvm-6502/test/CodeGen
Quentin Colombet 8b594ba851 Add a testcase for r199430.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199831 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-22 20:11:50 +00:00
..
AArch64 [AArch64 NEON] Try to generate CONCAT_VECTOR when lowering BUILD_VECTOR or SHUFFLE_VECTOR. 2014-01-22 06:11:03 +00:00
ARM Fix inline assembly that switches between ARM and Thumb modes 2014-01-22 18:32:35 +00:00
CPP
Generic
Hexagon
Inputs
Mips Fix PR18572 - llc crash during GenericScheduler::initPolicy(). 2014-01-21 21:27:37 +00:00
MSP430
NVPTX [NVPTX] Add missing patterns for div.approx with immediate denominator 2014-01-21 14:40:05 +00:00
PowerPC Fix pointer info on PPC byval stores 2014-01-21 20:15:58 +00:00
R600 R600: MOVA is vector only 2014-01-22 19:24:24 +00:00
SPARC [Sparc] Add support for inline assembly constraints which specify registers by their aliases. 2014-01-22 03:18:42 +00:00
SystemZ [SystemZ] Flesh out stackrestore test (frame-11.ll) 2014-01-13 15:44:44 +00:00
Thumb CodeGen: Stop treating vectors as aggregates 2014-01-21 22:46:46 +00:00
Thumb2
X86 Add a testcase for r199430. 2014-01-22 20:11:50 +00:00
XCore