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No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137094 91177308-0d34-0410-b5e6-96231b3b80d8
107 lines
3.9 KiB
C++
107 lines
3.9 KiB
C++
//===-- RegisterCoalescer.h - Register Coalescing Interface ------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the abstract interface for register coalescers,
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// allowing them to interact with and query register allocators.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_REGISTER_COALESCER_H
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#define LLVM_CODEGEN_REGISTER_COALESCER_H
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namespace llvm {
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class MachineInstr;
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class TargetRegisterInfo;
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class TargetRegisterClass;
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class TargetInstrInfo;
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/// CoalescerPair - A helper class for register coalescers. When deciding if
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/// two registers can be coalesced, CoalescerPair can determine if a copy
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/// instruction would become an identity copy after coalescing.
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class CoalescerPair {
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const TargetInstrInfo &TII;
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const TargetRegisterInfo &TRI;
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/// DstReg - The register that will be left after coalescing. It can be a
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/// virtual or physical register.
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unsigned DstReg;
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/// SrcReg - the virtual register that will be coalesced into dstReg.
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unsigned SrcReg;
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/// subReg_ - The subregister index of srcReg in DstReg. It is possible the
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/// coalesce SrcReg into a subreg of the larger DstReg when DstReg is a
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/// virtual register.
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unsigned SubIdx;
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/// Partial - True when the original copy was a partial subregister copy.
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bool Partial;
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/// CrossClass - True when both regs are virtual, and newRC is constrained.
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bool CrossClass;
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/// Flipped - True when DstReg and SrcReg are reversed from the oriignal
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/// copy instruction.
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bool Flipped;
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/// NewRC - The register class of the coalesced register, or NULL if DstReg
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/// is a physreg.
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const TargetRegisterClass *NewRC;
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public:
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CoalescerPair(const TargetInstrInfo &tii, const TargetRegisterInfo &tri)
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: TII(tii), TRI(tri), DstReg(0), SrcReg(0), SubIdx(0),
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Partial(false), CrossClass(false), Flipped(false), NewRC(0) {}
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/// setRegisters - set registers to match the copy instruction MI. Return
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/// false if MI is not a coalescable copy instruction.
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bool setRegisters(const MachineInstr*);
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/// flip - Swap SrcReg and DstReg. Return false if swapping is impossible
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/// because DstReg is a physical register, or SubIdx is set.
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bool flip();
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/// isCoalescable - Return true if MI is a copy instruction that will become
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/// an identity copy after coalescing.
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bool isCoalescable(const MachineInstr*) const;
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/// isPhys - Return true if DstReg is a physical register.
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bool isPhys() const { return !NewRC; }
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/// isPartial - Return true if the original copy instruction did not copy
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/// the full register, but was a subreg operation.
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bool isPartial() const { return Partial; }
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/// isCrossClass - Return true if DstReg is virtual and NewRC is a smaller
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/// register class than DstReg's.
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bool isCrossClass() const { return CrossClass; }
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/// isFlipped - Return true when getSrcReg is the register being defined by
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/// the original copy instruction.
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bool isFlipped() const { return Flipped; }
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/// getDstReg - Return the register (virtual or physical) that will remain
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/// after coalescing.
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unsigned getDstReg() const { return DstReg; }
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/// getSrcReg - Return the virtual register that will be coalesced away.
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unsigned getSrcReg() const { return SrcReg; }
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/// getSubIdx - Return the subregister index in DstReg that SrcReg will be
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/// coalesced into, or 0.
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unsigned getSubIdx() const { return SubIdx; }
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/// getNewRC - Return the register class of the coalesced register.
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const TargetRegisterClass *getNewRC() const { return NewRC; }
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};
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} // End llvm namespace
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#endif
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