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33ff5aeaa8
Generate code for Mips32r1 unless a Mips32r2 feature is tested. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139433 91177308-0d34-0410-b5e6-96231b3b80d8
19 lines
470 B
LLVM
19 lines
470 B
LLVM
; RUN: llc < %s -march=mipsel | FileCheck %s -check-prefix=CHECK-MIPS32
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@g1 = external global i32
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define i32 @f(float %f0, float %f1) nounwind {
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entry:
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; CHECK-MIPS32: c.olt.s
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; CHECK-MIPS32: movt
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; CHECK-MIPS32: c.olt.s
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; CHECK-MIPS32: movt
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%cmp = fcmp olt float %f0, %f1
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%conv = zext i1 %cmp to i32
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%tmp2 = load i32* @g1, align 4
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%add = add nsw i32 %tmp2, %conv
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store i32 %add, i32* @g1, align 4
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%cond = select i1 %cmp, i32 10, i32 20
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ret i32 %cond
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}
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