mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-30 17:33:24 +00:00
d7f5fac111
Phabricator code review is located at: http://llvm-reviews.chandlerc.com/D1759 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191481 91177308-0d34-0410-b5e6-96231b3b80d8
587 lines
14 KiB
ArmAsm
587 lines
14 KiB
ArmAsm
// RUN: llvm-mc -triple x86_64-unknown-unknown -x86-asm-syntax=intel %s | FileCheck %s
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_test:
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xor EAX, EAX
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ret
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_main:
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// CHECK: movl $257, -4(%rsp)
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mov DWORD PTR [RSP - 4], 257
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// CHECK: movl $258, 4(%rsp)
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mov DWORD PTR [RSP + 4], 258
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// CHECK: movq $123, -16(%rsp)
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mov QWORD PTR [RSP - 16], 123
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// CHECK: movb $97, -17(%rsp)
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mov BYTE PTR [RSP - 17], 97
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// CHECK: movl -4(%rsp), %eax
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mov EAX, DWORD PTR [RSP - 4]
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// CHECK: movq (%rsp), %rax
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mov RAX, QWORD PTR [RSP]
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// CHECK: movl $-4, -4(%rsp)
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mov DWORD PTR [RSP - 4], -4
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// CHECK: movq 0, %rcx
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mov RCX, QWORD PTR [0]
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// CHECK: movl -24(%rsp,%rax,4), %eax
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mov EAX, DWORD PTR [RSP + 4*RAX - 24]
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// CHECK: movb %dil, (%rdx,%rcx)
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mov BYTE PTR [RDX + RCX], DIL
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// CHECK: movzwl 2(%rcx), %edi
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movzx EDI, WORD PTR [RCX + 2]
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// CHECK: callq _test
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call _test
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// CHECK: andw $12, %ax
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and ax, 12
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// CHECK: andw $-12, %ax
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and ax, -12
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// CHECK: andw $257, %ax
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and ax, 257
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// CHECK: andw $-257, %ax
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and ax, -257
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// CHECK: andl $12, %eax
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and eax, 12
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// CHECK: andl $-12, %eax
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and eax, -12
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// CHECK: andl $257, %eax
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and eax, 257
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// CHECK: andl $-257, %eax
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and eax, -257
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// CHECK: andq $12, %rax
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and rax, 12
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// CHECK: andq $-12, %rax
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and rax, -12
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// CHECK: andq $257, %rax
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and rax, 257
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// CHECK: andq $-257, %rax
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and rax, -257
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// CHECK: fld %st(0)
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fld ST(0)
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// CHECK: movl %fs:(%rdi), %eax
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mov EAX, DWORD PTR FS:[RDI]
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// CHECK: leal (,%rdi,4), %r8d
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lea R8D, DWORD PTR [4*RDI]
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// CHECK: movl _fnan(,%ecx,4), %ecx
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mov ECX, DWORD PTR [4*ECX + _fnan]
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// CHECK: movq %fs:320, %rax
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mov RAX, QWORD PTR FS:[320]
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// CHECK: movq %fs:320, %rax
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mov RAX, QWORD PTR FS:320
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// CHECK: movq %rax, %fs:320
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mov QWORD PTR FS:320, RAX
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// CHECK: movq %rax, %fs:20(%rbx)
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mov QWORD PTR FS:20[rbx], RAX
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// CHECK: vshufpd $1, %xmm2, %xmm1, %xmm0
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vshufpd XMM0, XMM1, XMM2, 1
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// CHECK: vpgatherdd %xmm8, (%r15,%xmm9,2), %xmm1
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vpgatherdd XMM10, DWORD PTR [R15 + 2*XMM9], XMM8
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// CHECK: movsd -8, %xmm5
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movsd XMM5, QWORD PTR [-8]
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// CHECK: movl %ecx, (%eax)
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mov [eax], ecx
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// CHECK: movl %ecx, (,%ebx,4)
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mov [4*ebx], ecx
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// CHECK: movl %ecx, (,%ebx,4)
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mov [ebx*4], ecx
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// CHECK: movl %ecx, 1024
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mov [1024], ecx
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// CHECK: movl %ecx, 4132
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mov [0x1024], ecx
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// CHECK: movl %ecx, 32
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mov [16 + 16], ecx
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// CHECK: movl %ecx, 0
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mov [16 - 16], ecx
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// CHECK: movl %ecx, 32
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mov [16][16], ecx
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// CHECK: movl %ecx, (%eax,%ebx,4)
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mov [eax + 4*ebx], ecx
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// CHECK: movl %ecx, (%eax,%ebx,4)
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mov [eax + ebx*4], ecx
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// CHECK: movl %ecx, (%eax,%ebx,4)
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mov [4*ebx + eax], ecx
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// CHECK: movl %ecx, (%eax,%ebx,4)
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mov [ebx*4 + eax], ecx
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// CHECK: movl %ecx, (%eax,%ebx,4)
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mov [eax][4*ebx], ecx
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// CHECK: movl %ecx, (%eax,%ebx,4)
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mov [eax][ebx*4], ecx
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// CHECK: movl %ecx, (%eax,%ebx,4)
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mov [4*ebx][eax], ecx
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// CHECK: movl %ecx, (%eax,%ebx,4)
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mov [ebx*4][eax], ecx
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// CHECK: movl %ecx, 12(%eax)
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mov [eax + 12], ecx
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// CHECK: movl %ecx, 12(%eax)
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mov [12 + eax], ecx
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// CHECK: movl %ecx, 32(%eax)
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mov [eax + 16 + 16], ecx
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// CHECK: movl %ecx, 32(%eax)
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mov [16 + eax + 16], ecx
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// CHECK: movl %ecx, 32(%eax)
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mov [16 + 16 + eax], ecx
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// CHECK: movl %ecx, 12(%eax)
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mov [eax][12], ecx
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// CHECK: movl %ecx, 12(%eax)
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mov [12][eax], ecx
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// CHECK: movl %ecx, 32(%eax)
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mov [eax][16 + 16], ecx
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// CHECK: movl %ecx, 32(%eax)
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mov [eax + 16][16], ecx
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// CHECK: movl %ecx, 32(%eax)
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mov [eax][16][16], ecx
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// CHECK: movl %ecx, 32(%eax)
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mov [16][eax + 16], ecx
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// CHECK: movl %ecx, 32(%eax)
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mov [16 + eax][16], ecx
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// CHECK: movl %ecx, 32(%eax)
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mov [16][16 + eax], ecx
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// CHECK: movl %ecx, 32(%eax)
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mov [16 + 16][eax], ecx
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// CHECK: movl %ecx, 32(%eax)
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mov [eax][16][16], ecx
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// CHECK: movl %ecx, 32(%eax)
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mov [16][eax][16], ecx
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// CHECK: movl %ecx, 32(%eax)
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mov [16][16][eax], ecx
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// CHECK: movl %ecx, 16(,%ebx,4)
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mov [4*ebx + 16], ecx
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// CHECK: movl %ecx, 16(,%ebx,4)
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mov [ebx*4 + 16], ecx
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// CHECK: movl %ecx, 16(,%ebx,4)
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mov [4*ebx][16], ecx
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// CHECK: movl %ecx, 16(,%ebx,4)
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mov [ebx*4][16], ecx
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// CHECK: movl %ecx, 16(,%ebx,4)
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mov [16 + 4*ebx], ecx
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// CHECK: movl %ecx, 16(,%ebx,4)
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mov [16 + ebx*4], ecx
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// CHECK: movl %ecx, 16(,%ebx,4)
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mov [16][4*ebx], ecx
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// CHECK: movl %ecx, 16(,%ebx,4)
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mov [16][ebx*4], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [eax + 4*ebx + 16], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [eax + 16 + 4*ebx], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [4*ebx + eax + 16], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [4*ebx + 16 + eax], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [16 + eax + 4*ebx], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [16 + eax + 4*ebx], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [eax][4*ebx + 16], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [eax][16 + 4*ebx], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [4*ebx][eax + 16], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [4*ebx][16 + eax], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [16][eax + 4*ebx], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [16][eax + 4*ebx], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [eax + 4*ebx][16], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [eax + 16][4*ebx], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [4*ebx + eax][16], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [4*ebx + 16][eax], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [16 + eax][4*ebx], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [16 + eax][4*ebx], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [eax][4*ebx][16], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [eax][16][4*ebx], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [4*ebx][eax][16], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [4*ebx][16][eax], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [16][eax][4*ebx], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [16][eax][4*ebx], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [eax + ebx*4 + 16], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [eax + 16 + ebx*4], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [ebx*4 + eax + 16], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [ebx*4 + 16 + eax], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [16 + eax + ebx*4], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [16 + eax + ebx*4], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [eax][ebx*4 + 16], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [eax][16 + ebx*4], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [ebx*4][eax + 16], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [ebx*4][16 + eax], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [16][eax + ebx*4], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [16][eax + ebx*4], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [eax + ebx*4][16], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [eax + 16][ebx*4], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [ebx*4 + eax][16], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [ebx*4 + 16][eax], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [16 + eax][ebx*4], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [16 + eax][ebx*4], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [eax][ebx*4][16], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [eax][16][ebx*4], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [ebx*4][eax][16], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [ebx*4][16][eax], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [16][eax][ebx*4], ecx
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// CHECK: movl %ecx, 16(%eax,%ebx,4)
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mov [16][eax][ebx*4], ecx
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// CHECK: movl %ecx, -16(%eax,%ebx,4)
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mov [eax][ebx*4 - 16], ecx
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// CHECK: prefetchnta 12800(%esi)
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prefetchnta [esi + (200*64)]
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// CHECK: prefetchnta 32(%esi)
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prefetchnta [esi + (64/2)]
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// CHECK: prefetchnta 128(%esi)
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prefetchnta [esi + (64/2*4)]
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// CHECK: prefetchnta 8(%esi)
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prefetchnta [esi + (64/(2*4))]
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// CHECK: prefetchnta 48(%esi)
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prefetchnta [esi + (64/(2*4)+40)]
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// CHECK: movl %ecx, -16(%eax,%ebx,4)
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mov [eax][ebx*4 - 2*8], ecx
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// CHECK: movl %ecx, -16(%eax,%ebx,4)
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mov [eax][4*ebx - 2*8], ecx
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// CHECK: movl %ecx, -16(%eax,%ebx,4)
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mov [eax + 4*ebx - 2*8], ecx
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// CHECK: movl %ecx, -16(%eax,%ebx,4)
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mov [12 + eax + (4*ebx) - 2*14], ecx
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// CHECK: movl %ecx, -16(%eax,%ebx,4)
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mov [eax][ebx*4 - 2*2*2*2], ecx
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// CHECK: movl %ecx, -16(%eax,%ebx,4)
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mov [eax][ebx*4 - (2*8)], ecx
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// CHECK: movl %ecx, -16(%eax,%ebx,4)
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mov [eax][ebx*4 - 2 * 8 + 4 - 4], ecx
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// CHECK: movl %ecx, -16(%eax,%ebx,4)
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mov [eax + ebx*4 - 2 * 8 + 4 - 4], ecx
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// CHECK: movl %ecx, -16(%eax,%ebx,4)
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mov [eax + ebx*4 - 2 * ((8 + 4) - 4)], ecx
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// CHECK: movl %ecx, -16(%eax,%ebx,4)
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mov [-2 * ((8 + 4) - 4) + eax + ebx*4], ecx
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// CHECK: movl %ecx, -16(%eax,%ebx,4)
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mov [((-2) * ((8 + 4) - 4)) + eax + ebx*4], ecx
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// CHECK: movl %ecx, -16(%eax,%ebx,4)
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mov [eax + ((-2) * ((8 + 4) - 4)) + ebx*4], ecx
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// CHECK: movl %ecx, 96(%eax,%ebx,4)
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mov [eax + ((-2) * ((8 + 4) * -4)) + ebx*4], ecx
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// CHECK: movl %ecx, -8(%eax,%ebx,4)
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mov [eax][-8][ebx*4], ecx
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// CHECK: movl %ecx, -2(%eax,%ebx,4)
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mov [eax][16/-8][ebx*4], ecx
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// CHECK: movl %ecx, -2(%eax,%ebx,4)
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mov [eax][(16)/-8][ebx*4], ecx
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// CHECK: setb %al
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setc al
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// CHECK: sete %al
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setz al
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// CHECK: setbe %al
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setna al
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// CHECK: setae %al
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setnb al
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// CHECK: setae %al
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setnc al
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// CHECK: setle %al
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setng al
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// CHECK: setge %al
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setnl al
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// CHECK: setne %al
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setnz al
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// CHECK: setp %al
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setpe al
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// CHECK: setnp %al
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setpo al
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// CHECK: setb %al
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setnae al
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// CHECK: seta %al
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setnbe al
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// CHECK: setl %al
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setnge al
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// CHECK: setg %al
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setnle al
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// CHECK: jne _foo
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jnz _foo
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// CHECK: outb %al, $4
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out 4, al
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ret
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// CHECK: cmovbl %ebx, %eax
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cmovc eax, ebx
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// CHECK: cmovel %ebx, %eax
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cmovz eax, ebx
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// CHECK: cmovbel %ebx, %eax
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cmovna eax, ebx
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// CHECK: cmovael %ebx, %eax
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cmovnb eax, ebx
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// CHECK: cmovael %ebx, %eax
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cmovnc eax, ebx
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// CHECK: cmovlel %ebx, %eax
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cmovng eax, ebx
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// CHECK: cmovgel %ebx, %eax
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cmovnl eax, ebx
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// CHECK: cmovnel %ebx, %eax
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cmovnz eax, ebx
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// CHECK: cmovpl %ebx, %eax
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cmovpe eax, ebx
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// CHECK: cmovnpl %ebx, %eax
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cmovpo eax, ebx
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// CHECK: cmovbl %ebx, %eax
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cmovnae eax, ebx
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// CHECK: cmoval %ebx, %eax
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cmovnbe eax, ebx
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// CHECK: cmovll %ebx, %eax
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cmovnge eax, ebx
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// CHECK: cmovgl %ebx, %eax
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cmovnle eax, ebx
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// CHECK: shldw %cl, %bx, %dx
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// CHECK: shldw %cl, %bx, %dx
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// CHECK: shldw $1, %bx, %dx
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// CHECK: shldw %cl, %bx, (%rax)
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// CHECK: shldw %cl, %bx, (%rax)
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// CHECK: shrdw %cl, %bx, %dx
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// CHECK: shrdw %cl, %bx, %dx
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// CHECK: shrdw $1, %bx, %dx
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// CHECK: shrdw %cl, %bx, (%rax)
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// CHECK: shrdw %cl, %bx, (%rax)
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shld DX, BX
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shld DX, BX, CL
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shld DX, BX, 1
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shld [RAX], BX
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shld [RAX], BX, CL
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shrd DX, BX
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shrd DX, BX, CL
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shrd DX, BX, 1
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shrd [RAX], BX
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shrd [RAX], BX, CL
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// CHECK: btl $1, (%eax)
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// CHECK: btsl $1, (%eax)
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// CHECK: btrl $1, (%eax)
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// CHECK: btcl $1, (%eax)
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bt DWORD PTR [EAX], 1
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bt DWORD PTR [EAX], 1
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bts DWORD PTR [EAX], 1
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btr DWORD PTR [EAX], 1
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btc DWORD PTR [EAX], 1
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//CHECK: divb %bl
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//CHECK: divw %bx
|
|
//CHECK: divl %ecx
|
|
//CHECK: divl 3735928559(%ebx,%ecx,8)
|
|
//CHECK: divl 69
|
|
//CHECK: divl 32493
|
|
//CHECK: divl 3133065982
|
|
//CHECK: divl 305419896
|
|
//CHECK: idivb %bl
|
|
//CHECK: idivw %bx
|
|
//CHECK: idivl %ecx
|
|
//CHECK: idivl 3735928559(%ebx,%ecx,8)
|
|
//CHECK: idivl 69
|
|
//CHECK: idivl 32493
|
|
//CHECK: idivl 3133065982
|
|
//CHECK: idivl 305419896
|
|
div AL, BL
|
|
div AX, BX
|
|
div EAX, ECX
|
|
div EAX, [ECX*8+EBX+0xdeadbeef]
|
|
div EAX, [0x45]
|
|
div EAX, [0x7eed]
|
|
div EAX, [0xbabecafe]
|
|
div EAX, [0x12345678]
|
|
idiv AL, BL
|
|
idiv AX, BX
|
|
idiv EAX, ECX
|
|
idiv EAX, [ECX*8+EBX+0xdeadbeef]
|
|
idiv EAX, [0x45]
|
|
idiv EAX, [0x7eed]
|
|
idiv EAX, [0xbabecafe]
|
|
idiv EAX, [0x12345678]
|
|
|
|
|
|
// CHECK: inb %dx, %al
|
|
// CHECK: inw %dx, %ax
|
|
// CHECK: inl %dx, %eax
|
|
// CHECK: outb %al, %dx
|
|
// CHECK: outw %ax, %dx
|
|
// CHECK: outl %eax, %dx
|
|
inb DX
|
|
inw DX
|
|
inl DX
|
|
outb DX
|
|
outw DX
|
|
outl DX
|
|
|
|
// CHECK: xchgq %rcx, %rax
|
|
// CHECK: xchgq %rcx, %rax
|
|
// CHECK: xchgl %ecx, %eax
|
|
// CHECK: xchgl %ecx, %eax
|
|
// CHECK: xchgw %cx, %ax
|
|
// CHECK: xchgw %cx, %ax
|
|
xchg RAX, RCX
|
|
xchg RCX, RAX
|
|
xchg EAX, ECX
|
|
xchg ECX, EAX
|
|
xchg AX, CX
|
|
xchg CX, AX
|
|
|
|
// CHECK: xchgq %rax, (%ecx)
|
|
// CHECK: xchgq %rax, (%ecx)
|
|
// CHECK: xchgl %eax, (%ecx)
|
|
// CHECK: xchgl %eax, (%ecx)
|
|
// CHECK: xchgw %ax, (%ecx)
|
|
// CHECK: xchgw %ax, (%ecx)
|
|
xchg RAX, [ECX]
|
|
xchg [ECX], RAX
|
|
xchg EAX, [ECX]
|
|
xchg [ECX], EAX
|
|
xchg AX, [ECX]
|
|
xchg [ECX], AX
|
|
|
|
// CHECK: testq (%ecx), %rax
|
|
// CHECK: testq (%ecx), %rax
|
|
// CHECK: testl (%ecx), %eax
|
|
// CHECK: testl (%ecx), %eax
|
|
// CHECK: testw (%ecx), %ax
|
|
// CHECK: testw (%ecx), %ax
|
|
// CHECK: testb (%ecx), %al
|
|
// CHECK: testb (%ecx), %al
|
|
test RAX, [ECX]
|
|
test [ECX], RAX
|
|
test EAX, [ECX]
|
|
test [ECX], EAX
|
|
test AX, [ECX]
|
|
test [ECX], AX
|
|
test AL, [ECX]
|
|
test [ECX], AL
|
|
|
|
// CHECK: fnstsw %ax
|
|
// CHECK: fnstsw %ax
|
|
// CHECK: fnstsw %ax
|
|
// CHECK: fnstsw %ax
|
|
fnstsw
|
|
fnstsw AX
|
|
fnstsw EAX
|
|
fnstsw AL
|
|
|
|
// CHECK: faddp %st(1)
|
|
// CHECK: fmulp %st(1)
|
|
// CHECK: fsubrp %st(1)
|
|
// CHECK: fsubp %st(1)
|
|
// CHECK: fdivrp %st(1)
|
|
// CHECK: fdivp %st(1)
|
|
faddp ST(1), ST(0)
|
|
fmulp ST(1), ST(0)
|
|
fsubp ST(1), ST(0)
|
|
fsubrp ST(1), ST(0)
|
|
fdivp ST(1), ST(0)
|
|
fdivrp ST(1), ST(0)
|
|
|
|
// CHECK: faddp %st(1)
|
|
// CHECK: fmulp %st(1)
|
|
// CHECK: fsubrp %st(1)
|
|
// CHECK: fsubp %st(1)
|
|
// CHECK: fdivrp %st(1)
|
|
// CHECK: fdivp %st(1)
|
|
faddp ST(0), ST(1)
|
|
fmulp ST(0), ST(1)
|
|
fsubp ST(0), ST(1)
|
|
fsubrp ST(0), ST(1)
|
|
fdivp ST(0), ST(1)
|
|
fdivrp ST(0), ST(1)
|
|
|
|
// CHECK: faddp %st(1)
|
|
// CHECK: fmulp %st(1)
|
|
// CHECK: fsubrp %st(1)
|
|
// CHECK: fsubp %st(1)
|
|
// CHECK: fdivrp %st(1)
|
|
// CHECK: fdivp %st(1)
|
|
faddp ST(1)
|
|
fmulp ST(1)
|
|
fsubp ST(1)
|
|
fsubrp ST(1)
|
|
fdivp ST(1)
|
|
fdivrp ST(1)
|
|
|
|
// CHECK: faddp %st(1)
|
|
// CHECK: fmulp %st(1)
|
|
// CHECK: fsubrp %st(1)
|
|
// CHECK: fsubp %st(1)
|
|
// CHECK: fdivrp %st(1)
|
|
// CHECK: fdivp %st(1)
|
|
faddp
|
|
fmulp
|
|
fsubp
|
|
fsubrp
|
|
fdivp
|
|
fdivrp
|
|
|
|
// CHECK: fadd %st(1)
|
|
// CHECK: fmul %st(1)
|
|
// CHECK: fsub %st(1)
|
|
// CHECK: fsubr %st(1)
|
|
// CHECK: fdiv %st(1)
|
|
// CHECK: fdivr %st(1)
|
|
fadd ST(0), ST(1)
|
|
fmul ST(0), ST(1)
|
|
fsub ST(0), ST(1)
|
|
fsubr ST(0), ST(1)
|
|
fdiv ST(0), ST(1)
|
|
fdivr ST(0), ST(1)
|
|
|
|
// CHECK: fadd %st(0), %st(1)
|
|
// CHECK: fmul %st(0), %st(1)
|
|
// CHECK: fsubr %st(0), %st(1)
|
|
// CHECK: fsub %st(0), %st(1)
|
|
// CHECK: fdivr %st(0), %st(1)
|
|
// CHECK: fdiv %st(0), %st(1)
|
|
fadd ST(1), ST(0)
|
|
fmul ST(1), ST(0)
|
|
fsub ST(1), ST(0)
|
|
fsubr ST(1), ST(0)
|
|
fdiv ST(1), ST(0)
|
|
fdivr ST(1), ST(0)
|
|
|
|
// CHECK: fadd %st(1)
|
|
// CHECK: fmul %st(1)
|
|
// CHECK: fsub %st(1)
|
|
// CHECK: fsubr %st(1)
|
|
// CHECK: fdiv %st(1)
|
|
// CHECK: fdivr %st(1)
|
|
fadd ST(1)
|
|
fmul ST(1)
|
|
fsub ST(1)
|
|
fsubr ST(1)
|
|
fdiv ST(1)
|
|
fdivr ST(1)
|