Craig Topper c5eaae4e9b Convert more static tables of registers used by calling convention to uint16_t to reduce space. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152538 91177308-0d34-0410-b5e6-96231b3b80d8

2012-03-11 07:57:25 +00:00

..

MCTargetDesc

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

TargetInfo

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CMakeLists.txt

Remove HexagonGenIntrinsics.inc from Hexagon cmake file. It does not appear in the Makefile and the output it produces isn't used. The Hexagon intrinsics are all in the global Intrinsics.gen.

2012-02-27 02:59:43 +00:00

Hexagon.h

Optimize redundant sign extends and negation of predicates.

2012-02-15 18:52:27 +00:00

Hexagon.td

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

HexagonAsmPrinter.cpp

Delete incorrect reference to inexistent Hexagon architecture manuals.

2012-02-27 23:00:52 +00:00

HexagonCallingConv.td

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HexagonCallingConvLower.cpp

Use uint16_t to store register overlaps to reduce static data.

2012-03-04 10:43:23 +00:00

HexagonCallingConvLower.h

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HexagonCFGOptimizer.cpp

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

HexagonExpandPredSpillCode.cpp

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

HexagonFrameLowering.cpp

Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce static data size.

2012-03-05 05:37:41 +00:00

HexagonFrameLowering.h

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HexagonHardwareLoops.cpp

Optimize redundant sign extends and negation of predicates.

2012-02-15 18:52:27 +00:00

HexagonImmediates.td

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

HexagonInstrFormats.td

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

HexagonInstrFormatsV4.td

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HexagonInstrInfo.cpp

Efficient pattern for store truncate. Patch by Evandro Menezes.

2012-02-22 16:45:10 +00:00

HexagonInstrInfo.h

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

HexagonInstrInfo.td

Efficient pattern for store truncate. Patch by Evandro Menezes.

2012-02-22 16:45:10 +00:00

HexagonInstrInfoV3.td

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HexagonInstrInfoV4.td

Optimize redundant sign extends and negation of predicates.

2012-02-15 18:52:27 +00:00

HexagonIntrinsics.td

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

HexagonIntrinsicsDerived.td

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HexagonIntrinsicsV3.td

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HexagonIntrinsicsV4.td

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HexagonISelDAGToDAG.cpp

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

HexagonISelLowering.cpp

Convert more static tables of registers used by calling convention to uint16_t to reduce space.

2012-03-11 07:57:25 +00:00

HexagonISelLowering.h

Re-commit r151623 with fix. Only issue special no-return calls if it's a direct call.

2012-02-28 18:51:51 +00:00

HexagonMachineFunctionInfo.h

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HexagonPeephole.cpp

Remove unused cl::opt, make another opt static.

2012-02-24 22:09:25 +00:00

HexagonRegisterInfo.cpp

Use uint16_t to store registers in callee saved register tables to reduce size of static data.

2012-03-04 03:33:22 +00:00

HexagonRegisterInfo.h

Use uint16_t to store registers in callee saved register tables to reduce size of static data.

2012-03-04 03:33:22 +00:00

HexagonRegisterInfo.td

Fix the numbering of some of the registers and reclassify a couple of them.

2012-02-23 18:17:17 +00:00

HexagonRemoveSZExtArgs.cpp

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HexagonSchedule.td

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

HexagonScheduleV4.td

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HexagonSelectCCInfo.td

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

HexagonSelectionDAGInfo.cpp

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HexagonSelectionDAGInfo.h

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

HexagonSplitTFRCondSets.cpp

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

HexagonSubtarget.cpp

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

HexagonSubtarget.h

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

HexagonTargetMachine.cpp

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

HexagonTargetMachine.h

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HexagonTargetObjectFile.cpp

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

HexagonTargetObjectFile.h

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

HexagonVarargsCallingConvention.h

Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.

2012-02-18 12:03:15 +00:00

LLVMBuild.txt

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Makefile

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