Evan Cheng b37b6ca4bb MOVi16 (movw) is only legal on cpus with V6T2 support. rdar://12300648 ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164169 91177308-0d34-0410-b5e6-96231b3b80d8		2012-09-18 21:24:16 +00:00
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ARM	MOVi16 (movw) is only legal on cpus with V6T2 support. rdar://12300648	2012-09-18 21:24:16 +00:00
CellSPU
CPP
Generic
Hexagon	LLVM Bug Fix 13709: Remove needless lsr(Rp, #32) instruction access the	2012-09-05 16:01:40 +00:00
MBlaze
Mips	Handled unaligned load/stores properly in Mips16	2012-09-15 01:02:03 +00:00
MSP430
NVPTX
PowerPC	Add test for r164155 and remove two tests superseded by ppc64-calls.ll.	2012-09-18 19:51:44 +00:00
SPARC
Thumb
Thumb2	Use vld1 / vst2 for unaligned v2f64 load / store. e.g. Use vld1.16 for 2-byte	2012-09-18 01:42:45 +00:00
X86	Add some cases to x86 OptimizeCompare to handle DEC and INC, too.	2012-09-17 22:04:23 +00:00
XCore