llvm-6502/test/CodeGen/AArch64/directcond.ll
Tim Northover 9105f66d6f AArch64/ARM64: remove AArch64 from tree prior to renaming ARM64.
I'm doing this in two phases for a better "git blame" record. This
commit removes the previous AArch64 backend and redirects all
functionality to ARM64. It also deduplicates test-lines and removes
orphaned AArch64 tests.

The next step will be "git mv ARM64 AArch64" and rewire most of the
tests.

Hopefully LLVM is still functional, though it would be even better if
no-one ever had to care because the rename happens straight
afterwards.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209576 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-24 12:42:26 +00:00

85 lines
2.0 KiB
LLVM

; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-apple-ios7.0 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ARM64
; RUN: llc -verify-machineinstrs < %s -mtriple=arm64-none-linux-gnu -mattr=-fp-armv8 | FileCheck --check-prefix=CHECK-NOFP %s
define i32 @test_select_i32(i1 %bit, i32 %a, i32 %b) {
; CHECK-LABEL: test_select_i32:
%val = select i1 %bit, i32 %a, i32 %b
; CHECK-ARM64: tst w0, #0x1
; CHECK-NEXT: csel w0, w1, w2, ne
ret i32 %val
}
define i64 @test_select_i64(i1 %bit, i64 %a, i64 %b) {
; CHECK-LABEL: test_select_i64:
%val = select i1 %bit, i64 %a, i64 %b
; CHECK-ARM64: tst w0, #0x1
; CHECK-NEXT: csel x0, x1, x2, ne
ret i64 %val
}
define float @test_select_float(i1 %bit, float %a, float %b) {
; CHECK-LABEL: test_select_float:
%val = select i1 %bit, float %a, float %b
; CHECK-ARM64: tst w0, #0x1
; CHECK-NEXT: fcsel s0, s0, s1, ne
; CHECK-NOFP-NOT: fcsel
ret float %val
}
define double @test_select_double(i1 %bit, double %a, double %b) {
; CHECK-LABEL: test_select_double:
%val = select i1 %bit, double %a, double %b
; CHECK-ARM64: tst w0, #0x1
; CHECK-NEXT: fcsel d0, d0, d1, ne
; CHECK-NOFP-NOT: fcsel
ret double %val
}
define i32 @test_brcond(i1 %bit) {
; CHECK-LABEL: test_brcond:
br i1 %bit, label %true, label %false
; CHECK: tbz {{w[0-9]+}}, #0, {{.?LBB}}
true:
ret i32 0
false:
ret i32 42
}
define i1 @test_setcc_float(float %lhs, float %rhs) {
; CHECK: test_setcc_float
%val = fcmp oeq float %lhs, %rhs
; CHECK: fcmp s0, s1
; CHECK: cset w0, eq
; CHECK-NOFP-NOT: fcmp
ret i1 %val
}
define i1 @test_setcc_double(double %lhs, double %rhs) {
; CHECK: test_setcc_double
%val = fcmp oeq double %lhs, %rhs
; CHECK: fcmp d0, d1
; CHECK: cset w0, eq
; CHECK-NOFP-NOT: fcmp
ret i1 %val
}
define i1 @test_setcc_i32(i32 %lhs, i32 %rhs) {
; CHECK: test_setcc_i32
%val = icmp ugt i32 %lhs, %rhs
; CHECK: cmp w0, w1
; CHECK: cset w0, hi
ret i1 %val
}
define i1 @test_setcc_i64(i64 %lhs, i64 %rhs) {
; CHECK: test_setcc_i64
%val = icmp ne i64 %lhs, %rhs
; CHECK: cmp x0, x1
; CHECK: cset w0, ne
ret i1 %val
}