Jim Grosbach 91c655736e ARM64: Improve diagnostics for malformed reg+reg addressing mode. ... Make sure only general purpose registers are valid for offset regs and that 32-bit regs are only valid for sxtw and uxtw extends. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206799 91177308-0d34-0410-b5e6-96231b3b80d8		2014-04-21 21:45:57 +00:00
..
AArch64	AArch64/ARM64: produce correct relocation for conditional branches.	2014-04-16 15:27:52 +00:00
ARM	Change the ARM assembler to require a :lower16: or :upper16 on non-constant	2014-04-18 23:06:39 +00:00
ARM64	ARM64: Improve diagnostics for malformed reg+reg addressing mode.	2014-04-21 21:45:57 +00:00
AsmParser	Patch by Ray Donnelly to print register names instead of numbers.	2014-04-19 05:40:09 +00:00
COFF	COFF: fix an off by one error	2014-04-16 06:22:53 +00:00
Disassembler	[X86] Add disassembler support for the 0x0f 0x7f form of movq %mm, %mm.	2014-04-17 06:33:45 +00:00
ELF	Handle _GLOBAL_OFFSET_TABLE_ in 64 bit mode.	2014-04-21 21:15:45 +00:00
MachO	[MC] Emit an error if cfi_startproc is used before a symbol is defined.	2014-04-15 01:17:45 +00:00
Markup
Mips	[mips] Use TwoOperandAliasConstraint for shift instructions.	2014-04-16 16:28:59 +00:00
PowerPC	[MC] Emit an error if cfi_startproc is used before a symbol is defined.	2014-04-15 01:17:45 +00:00
Sparc
SystemZ
X86