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llvm-6502
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test
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Disassembler
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Venkatraman Govindaraju
9314308db1
[Sparc] Add support to decode unimp instruction.
...
git-svn-id:
https://llvm.org/svn/llvm-project/llvm/trunk@202581
91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-01 09:28:18 +00:00
..
AArch64
…
ARM
ARM: change implicit immediate forms of {ld,st}r{,b}t to psuedo-instructions
2014-01-12 04:36:01 +00:00
Mips
LL and SC decoder method fix.
2014-01-15 13:17:33 +00:00
PowerPC
…
Sparc
[Sparc] Add support to decode unimp instruction.
2014-03-01 09:28:18 +00:00
SystemZ
…
X86
Remove A6/A7 opcode maps. They can all be handled with a TB map, opcode of 0xa6/0xa7, and adding MRM_C0/MRM_E0 forms. Removes 376K from the disassembler tables.
2014-02-19 05:34:21 +00:00
XCore
…
