Tim Northover 93185d186c ARM64: give TST aliases priority over ANDS.
If an ANDS instruction has Rd == ZR it should be printed as TST since
its only effect is on the flags register NZCV.

This will be tested when the TableGen "should I print this Alias"
heuristic is fixed (very soon).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208959 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-16 09:41:08 +00:00
..
2014-04-20 23:59:00 +00:00