Akira Hatanaka 9367b8d4f2 [mips] v4i8 and v2i16 add, sub and mul instruction selection patterns. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179420 91177308-0d34-0410-b5e6-96231b3b80d8

2013-04-12 22:14:24 +00:00

..

AArch64

Replace coff-/elf-dump with llvm-readobj

2013-04-12 04:06:46 +00:00

ARM

Replace coff-/elf-dump with llvm-readobj

2013-04-12 04:06:46 +00:00

CPP

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Generic

XFAIL some of the generic CodeGen tests for Hexagon.

2013-03-25 21:04:16 +00:00

Hexagon

Hexagon: Enable SupportDebugInfomation and DwarfInSection flags.

2013-03-28 19:34:49 +00:00

Inputs

Revert "Adding DIImportedModules to DIScopes."

2013-03-28 02:44:59 +00:00

MBlaze

Remove unnecessary leading comment characters in lit-only file

2013-03-18 22:08:16 +00:00

Mips

[mips] v4i8 and v2i16 add, sub and mul instruction selection patterns.

2013-04-12 22:14:24 +00:00

MSP430

Remove unnecessary leading comment characters in lit-only file

2013-03-18 22:08:16 +00:00

NVPTX

[NVPTX] Remove support for SM < 2.0. This was never fully supported anyway.

2013-03-30 14:29:30 +00:00

PowerPC

Replace coff-/elf-dump with llvm-readobj

2013-04-12 04:06:46 +00:00

R600

R600/SI: Add pattern for AMDGPUurecip

2013-04-10 17:17:56 +00:00

SI

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SPARC

Compute correct frame sizes for SPARC v9 64-bit frames.

2013-04-09 04:37:47 +00:00

Thumb

Revert "Adding DIImportedModules to DIScopes."

2013-03-28 02:44:59 +00:00

Thumb2

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X86

Fix the test on linux by setting the triple and the align format

2013-04-12 01:07:16 +00:00

XCore

Remove unnecessary leading comment characters in lit-only file

2013-03-18 22:08:16 +00:00