mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-28 19:31:58 +00:00
6b617a7213
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96777 91177308-0d34-0410-b5e6-96231b3b80d8
156 lines
3.0 KiB
LLVM
156 lines
3.0 KiB
LLVM
; RUN: opt < %s -instcombine -S | FileCheck %s
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; Infinity
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; CHECK: inf0
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; CHECK: ret i1 false
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define i1 @inf0(double %arg) nounwind readnone {
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%tmp = fcmp ogt double %arg, 0x7FF0000000000000
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ret i1 %tmp
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}
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; CHECK: inf1
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; CHECK: ret i1 true
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define i1 @inf1(double %arg) nounwind readnone {
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%tmp = fcmp ule double %arg, 0x7FF0000000000000
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ret i1 %tmp
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}
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; Negative infinity
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; CHECK: ninf0
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; CHECK: ret i1 false
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define i1 @ninf0(double %arg) nounwind readnone {
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%tmp = fcmp olt double %arg, 0xFFF0000000000000
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ret i1 %tmp
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}
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; CHECK: ninf1
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; CHECK: ret i1 true
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define i1 @ninf1(double %arg) nounwind readnone {
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%tmp = fcmp uge double %arg, 0xFFF0000000000000
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ret i1 %tmp
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}
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; NaNs
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; CHECK: nan0
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; CHECK: ret i1 false
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define i1 @nan0(double %arg) nounwind readnone {
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%tmp = fcmp ord double %arg, 0x7FF00000FFFFFFFF
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ret i1 %tmp
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}
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; CHECK: nan1
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; CHECK: ret i1 false
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define i1 @nan1(double %arg) nounwind readnone {
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%tmp = fcmp oeq double %arg, 0x7FF00000FFFFFFFF
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ret i1 %tmp
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}
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; CHECK: nan2
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; CHECK: ret i1 false
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define i1 @nan2(double %arg) nounwind readnone {
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%tmp = fcmp olt double %arg, 0x7FF00000FFFFFFFF
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ret i1 %tmp
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}
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; CHECK: nan3
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; CHECK: ret i1 true
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define i1 @nan3(double %arg) nounwind readnone {
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%tmp = fcmp uno double %arg, 0x7FF00000FFFFFFFF
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ret i1 %tmp
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}
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; CHECK: nan4
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; CHECK: ret i1 true
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define i1 @nan4(double %arg) nounwind readnone {
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%tmp = fcmp une double %arg, 0x7FF00000FFFFFFFF
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ret i1 %tmp
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}
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; CHECK: nan5
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; CHECK: ret i1 true
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define i1 @nan5(double %arg) nounwind readnone {
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%tmp = fcmp ult double %arg, 0x7FF00000FFFFFFFF
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ret i1 %tmp
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}
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; Negative NaN.
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; CHECK: nnan0
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; CHECK: ret i1 false
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define i1 @nnan0(double %arg) nounwind readnone {
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%tmp = fcmp ord double %arg, 0xFFF00000FFFFFFFF
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ret i1 %tmp
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}
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; CHECK: nnan1
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; CHECK: ret i1 false
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define i1 @nnan1(double %arg) nounwind readnone {
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%tmp = fcmp oeq double %arg, 0xFFF00000FFFFFFFF
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ret i1 %tmp
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}
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; CHECK: nnan2
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; CHECK: ret i1 false
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define i1 @nnan2(double %arg) nounwind readnone {
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%tmp = fcmp olt double %arg, 0xFFF00000FFFFFFFF
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ret i1 %tmp
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}
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; CHECK: nnan3
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; CHECK: ret i1 true
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define i1 @nnan3(double %arg) nounwind readnone {
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%tmp = fcmp uno double %arg, 0xFFF00000FFFFFFFF
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ret i1 %tmp
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}
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; CHECK: nnan4
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; CHECK: ret i1 true
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define i1 @nnan4(double %arg) nounwind readnone {
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%tmp = fcmp une double %arg, 0xFFF00000FFFFFFFF
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ret i1 %tmp
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}
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; CHECK: nnan5
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; CHECK: ret i1 true
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define i1 @nnan5(double %arg) nounwind readnone {
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%tmp = fcmp ult double %arg, 0xFFF00000FFFFFFFF
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ret i1 %tmp
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}
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; Negative zero.
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; CHECK: nzero0
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; CHECK: ret i1 true
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define i1 @nzero0() {
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%tmp = fcmp oeq double 0.0, -0.0
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ret i1 %tmp
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}
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; CHECK: nzero1
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; CHECK: ret i1 false
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define i1 @nzero1() {
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%tmp = fcmp ogt double 0.0, -0.0
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ret i1 %tmp
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}
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; Misc.
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; CHECK: misc0
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; CHECK: %tmp = fcmp ord double %arg, 0.000000e+00
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; CHECK: ret i1 %tmp
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define i1 @misc0(double %arg) {
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%tmp = fcmp oeq double %arg, %arg
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ret i1 %tmp
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}
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; CHECK: misc1
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; CHECK: ret i1 false
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define i1 @misc1(double %arg) {
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%tmp = fcmp one double %arg, %arg
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ret i1 %tmp
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}
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