Misha Brukman de07be3b78 Fixed a bunch of test cases in test/Regression/Jello which could not get the ...

address of a floating-point (allocated via ConstantPool) correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6647 91177308-0d34-0410-b5e6-96231b3b80d8

2003-06-06 04:41:22 +00:00

..

InstrSched

Remove usage of noncopyable classes to clean up doxygen output.

2003-06-02 22:45:07 +00:00

InstrSelection

I have finally seen the light. The code to change the opcode must live higher in

2003-06-04 04:54:06 +00:00

LiveVar

…

ModuloScheduling

compiled with the new SchedGraphCommon

2003-06-02 17:48:56 +00:00

RegAlloc

Minor changes.

2003-05-31 07:41:54 +00:00

.cvsignore

…

EmitBytecodeToAssembly.cpp

…

MachineCodeForInstruction.h

…

MachineFunctionInfo.h

…

MachineInstrAnnot.h

Renamed a variable.

2003-05-31 07:43:41 +00:00

Makefile

Use the new -o tablegen option

2003-06-03 05:06:33 +00:00

MappingInfo.cpp

lib/CodeGen/Mapping/MappingInfo.cpp:

2003-06-04 22:07:12 +00:00

MappingInfo.h

Add file comment. Include <vector> and <string>. Update include guards

2003-06-04 22:02:47 +00:00

SparcV9_F2.td

Moved predict and annul fields to the end of each individual instruction

2003-06-05 23:33:15 +00:00

SparcV9_F3.td

Added missing directive to store the instruction name.

2003-06-05 23:35:11 +00:00

SparcV9_F4.td

Added the 4.7 instruction class and all the FMOVcc instructions in them.

2003-06-04 04:48:31 +00:00

SparcV9_Reg.td

…

SparcV9.burg.in

…

SparcV9.td

The SUB*i instructions belong to a different class than their SUB*r brethren.

2003-06-06 03:34:47 +00:00

SparcV9AsmPrinter.cpp

…

SparcV9CodeEmitter.cpp

Fixed a bunch of test cases in test/Regression/Jello which could not get the

2003-06-06 04:41:22 +00:00

SparcV9CodeEmitter.h

Added lazy function resolution to the JIT.

2003-06-05 20:52:06 +00:00

SparcV9Instr.def

Added MOVR (move int reg on register condition), aka comparison with zero.

2003-06-02 21:16:54 +00:00

SparcV9InstrInfo.cpp

Convert load/store opcodes from register to immediate forms, if necessary.

2003-06-03 03:20:57 +00:00

SparcV9InstrSelection.cpp

* Convert load/store opcodes from register to immediate forms.

2003-06-03 03:21:58 +00:00

SparcV9InstrSelectionSupport.h

Added opcode conversion for conditional move of integers.

2003-06-03 03:23:35 +00:00

SparcV9Internals.h

…

SparcV9PeepholeOpts.cpp

…

SparcV9PreSelection.cpp

Minor tuning -- avoid a non-inlinable function call on every operand.

2003-06-05 21:12:56 +00:00

SparcV9PrologEpilogInserter.cpp

…

SparcV9RegClassInfo.cpp

…

SparcV9RegClassInfo.h

…

SparcV9RegInfo.cpp

Add map info for arguments to call (copies)

2003-06-01 02:48:23 +00:00

SparcV9SchedInfo.cpp

…

SparcV9StackSlots.cpp

…

SparcV9TargetMachine.cpp

lib/CodeGen/Mapping/MappingInfo.cpp:

2003-06-04 22:07:12 +00:00