Bill Wendling 9493a285d1 Replace the "movnt" intrinsics with a native store + nontemporal metadata bit. ...

<rdar://problem/8460511>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130791 91177308-0d34-0410-b5e6-96231b3b80d8

2011-05-03 21:11:17 +00:00

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Alpha

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ARM

Make the test less likely to fail with minor changes.

2011-05-03 19:09:32 +00:00

Blackfin

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CBackend

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CellSPU

don't test for codegen of 'store undef'

2011-04-09 02:31:26 +00:00

CPP

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Generic

Un-XFAIL this test for ARM. <rdar://problem/7662569>

2011-04-20 21:47:45 +00:00

MBlaze

Add scheduling information for the MBlaze backend.

2011-04-11 22:31:52 +00:00

Mips

Lower BlockAddress node when relocation-model is static.

2011-04-25 17:10:45 +00:00

MSP430

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PowerPC

Add 130690 back.

2011-05-02 15:58:16 +00:00

PTX

PTX: support for bitwise operations on predicates

2011-04-28 00:19:51 +00:00

SPARC

These tests no longer require linear scan because reserved register coalescing is now universal.

2011-04-05 21:40:41 +00:00

SystemZ

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Thumb

Be careful about scheduling nodes above previous calls. It increase usages of

2011-04-26 21:31:35 +00:00

Thumb2

Weekly fix of register allocation dependent unit tests.

2011-04-30 01:37:52 +00:00

X86

Replace the "movnt" intrinsics with a native store + nontemporal metadata bit.

2011-05-03 21:11:17 +00:00

XCore

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