Nate Begeman 94be248dbb First pass at supporting relocations. Relocations are written correctly to ...

the file now, however the relocated address is currently wrong.  Fixing
that will require some deep pondering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30207 91177308-0d34-0410-b5e6-96231b3b80d8

2006-09-08 22:42:09 +00:00

..

SelectionDAG

Fix CodeGen/Generic/2006-09-06-SwitchLowering.ll, a bug where SDIsel inserted

2006-09-07 01:59:34 +00:00

AsmPrinter.cpp

Make target asm info a property of the target machine.

2006-09-07 22:06:40 +00:00

BranchFolding.cpp

…

DwarfWriter.cpp

Make target asm info a property of the target machine.

2006-09-07 22:06:40 +00:00

ELFWriter.cpp

Refactor a bunch of includes so that TargetMachine.h doesn't have to include

2006-05-12 06:33:49 +00:00

IntrinsicLowering.cpp

…

LiveInterval.cpp

When joining two intervals where the RHS is really simple, use a light-weight

2006-09-02 05:26:59 +00:00

LiveIntervalAnalysis.cpp

Fix a long-standing wart in the code generator: two-address instruction lowering

2006-09-05 02:12:02 +00:00

LiveVariables.cpp

Only call isUse/isDef on register operands

2006-09-05 20:19:27 +00:00

LLVMTargetMachine.cpp

add setJumpBufSize() and setJumpBufAlignment() to target-lowering.

2006-09-04 06:21:35 +00:00

MachineBasicBlock.cpp

Refactor a bunch of includes so that TargetMachine.h doesn't have to include

2006-05-12 06:33:49 +00:00

MachineDebugInfo.cpp

Adding C++ member support.

2006-08-21 21:20:18 +00:00

MachineFunction.cpp

s|llvm/Support/Visibility.h|llvm/Support/Compiler.h|

2006-08-27 12:54:02 +00:00

MachineInstr.cpp

Only call isUse/isDef on register operands

2006-09-05 20:19:27 +00:00

MachinePassRegistry.cpp

Final polish on machine pass registries.

2006-08-02 12:30:23 +00:00

MachOWriter.cpp

First pass at supporting relocations. Relocations are written correctly to

2006-09-08 22:42:09 +00:00

Makefile

Fix linking on Alpha

2006-07-20 17:27:58 +00:00

Passes.cpp

Work around a bug in gcc 3.3.5, reported by a user

2006-08-03 00:16:56 +00:00

PHIElimination.cpp

s|llvm/Support/Visibility.h|llvm/Support/Compiler.h|

2006-08-27 12:54:02 +00:00

PhysRegTracker.h

…

PrologEpilogInserter.cpp

s|llvm/Support/Visibility.h|llvm/Support/Compiler.h|

2006-08-27 12:54:02 +00:00

RegAllocLinearScan.cpp

s|llvm/Support/Visibility.h|llvm/Support/Compiler.h|

2006-08-27 12:54:02 +00:00

RegAllocLocal.cpp

Non-allocatable physregs can be killed and dead, but don't treat them as

2006-09-08 20:21:31 +00:00

RegAllocSimple.cpp

Fix a long-standing wart in the code generator: two-address instruction lowering

2006-09-05 02:12:02 +00:00

TwoAddressInstructionPass.cpp

Fix a long-standing wart in the code generator: two-address instruction lowering

2006-09-05 02:12:02 +00:00

UnreachableBlockElim.cpp

eliminate RegisterOpt. It does the same thing as RegisterPass.

2006-08-27 22:42:52 +00:00

VirtRegMap.cpp

Fix a long-standing wart in the code generator: two-address instruction lowering

2006-09-05 02:12:02 +00:00

VirtRegMap.h

Fix a long-standing wart in the code generator: two-address instruction lowering

2006-09-05 02:12:02 +00:00