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llvm-6502/lib/Target/PowerPC
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Misha Brukman 9691a898c7 Remove debug code emitter from the JIT 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17151 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-21 03:07:38 +00:00
..
LICENSE.TXT
…
Makefile
* Make a PPC32-specific code emitter because we have separate classes for 32-
2004-10-14 06:04:56 +00:00
Makefile.am
PPC32GenCodeEmitter instead of PowerPCGenCodeEmitter
2004-10-17 14:59:38 +00:00
Makefile.in
Initial automake generated Makefile template
2004-10-18 23:55:41 +00:00
PowerPC.td
PowerPC instruction definitions use LittleEndian-style encoding [0..31]
2004-10-14 05:54:38 +00:00
PowerPCInstrInfo.h
…
PowerPCRegisterInfo.h
…
PowerPCTargetMachine.h
All PPC instructions are now auto-printed
2004-09-04 05:00:00 +00:00
PPC32.td
PowerPC instruction definitions use LittleEndian-style encoding [0..31]
2004-10-14 05:54:38 +00:00
PPC32ISelSimple.cpp
Don't clear or sign extend bool->int. This fires a few dozen times on the test suite
2004-10-20 21:55:41 +00:00
PPC32JITInfo.h
…
PPC32RegisterInfo.td
Switch from bytes to bits for alignment.
2004-08-21 20:14:40 +00:00
PPC64.td
PowerPC instruction definitions use LittleEndian-style encoding [0..31]
2004-10-14 05:54:38 +00:00
PPC64CodeEmitter.cpp
…
PPC64InstrInfo.cpp
…
PPC64InstrInfo.h
…
PPC64ISelSimple.cpp
Several fixes and enhancements to the PPC32 backend.
2004-10-07 22:30:03 +00:00
PPC64JITInfo.h
…
PPC64RegisterInfo.cpp
Correct some BuildMI arguments for the upcoming simple scheduler
2004-09-27 05:08:17 +00:00
PPC64RegisterInfo.h
…
PPC64RegisterInfo.td
Switch from bytes to bits for alignment.
2004-08-21 20:14:40 +00:00
PPC64TargetMachine.h
…
PPC.h
All PPC instructions are now auto-printed
2004-09-04 05:00:00 +00:00
PPCAsmPrinter.cpp
Generate correct stubs for weak-linked symbols
2004-10-17 23:01:34 +00:00
PPCBranchSelector.cpp
Remove unnecessary header include
2004-10-07 22:24:32 +00:00
PPCCodeEmitter.cpp
Remove debug code emitter from the JIT
2004-10-21 03:07:38 +00:00
PPCFrameInfo.h
…
PPCInstrBuilder.h
…
PPCInstrFormats.td
There is only one field in an instruction, and that is `Inst', the final view of
2004-10-14 05:55:37 +00:00
PPCInstrInfo.cpp
Add ori reg, reg, 0 as a move instruction. This can be generated from
2004-10-07 22:26:12 +00:00
PPCInstrInfo.h
…
PPCInstrInfo.td
Finally fix one of the oldest FIXMEs in the PowerPC backend: correctly
2004-10-16 20:43:38 +00:00
PPCJITInfo.h
…
PPCRegisterInfo.cpp
Correct some BuildMI arguments for the upcoming simple scheduler
2004-09-27 05:08:17 +00:00
PPCRegisterInfo.h
…
PPCRegisterInfo.td
Revamp the Register class, and allow the use of the RegisterGroup class to
2004-09-14 04:17:02 +00:00
PPCTargetMachine.cpp
bling bling!
2004-10-10 16:26:13 +00:00
PPCTargetMachine.h
All PPC instructions are now auto-printed
2004-09-04 05:00:00 +00:00
README.txt
All PPC instructions are now auto-printed
2004-09-04 05:00:00 +00:00

README.txt 

TODO:
* implement not-R0 register GPR class
* fix rlwimi generation to be use-and-def
* implement scheduling info
* implement powerpc-64 for darwin
* implement powerpc-64 for aix
* use stfiwx in float->int
* should hint to the branch select pass that it doesn't need to print the
  second unconditional branch, so we don't end up with things like:
	b .LBBl42__2E_expand_function_8_674	; loopentry.24
	b .LBBl42__2E_expand_function_8_42	; NewDefault
	b .LBBl42__2E_expand_function_8_42	; NewDefault

Currently failing tests that should pass:
* MultiSource
  |- Applications
  |  `- hbd: miscompilation