Nate Begeman 9765c25eb7 Implement setcc op, -1 sequences
Remove dead setcc op, 0 sequences
Coming later: generalization of op, imm


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21260 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-12 21:22:28 +00:00
..
2004-11-21 00:00:54 +00:00
2004-12-16 17:26:44 +00:00
2004-12-16 16:31:57 +00:00
2004-12-16 16:31:57 +00:00
2004-11-23 05:57:57 +00:00
2004-12-16 16:31:57 +00:00
2004-11-23 18:47:55 +00:00

TODO:
* condition register allocation
* gpr0 allocation
* implement do-loop -> bdnz transform
* implement powerpc-64 for darwin
* use stfiwx in float->int
* should hint to the branch select pass that it doesn't need to print the
  second unconditional branch, so we don't end up with things like:
	b .LBBl42__2E_expand_function_8_674	; loopentry.24
	b .LBBl42__2E_expand_function_8_42	; NewDefault
	b .LBBl42__2E_expand_function_8_42	; NewDefault

Currently failing tests that should pass:
* MultiSource
  |- Applications
  |  `- hbd: miscompilation