Evan Cheng b89be6150a Add RCBarriers to TargetInstrDesc. It's a list of register classes the given instruction can "clobber". For example, on x86 the call instruction can modify all of the XMM and fp stack registers. ...

TableGen has been taught to generate the lists from instruction definitions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57722 91177308-0d34-0410-b5e6-96231b3b80d8

2008-10-17 21:00:09 +00:00

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buildit

Set UNIVERSAL_ARCH value.

2008-10-06 21:24:48 +00:00

emacs

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fpcmp

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PerfectShuffle

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TableGen

Add RCBarriers to TargetInstrDesc. It's a list of register classes the given instruction can "clobber". For example, on x86 the call instruction can modify all of the XMM and fp stack registers.

2008-10-17 21:00:09 +00:00

vim

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cgiplotNLT.pl

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check-each-file

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codegen-diff

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countloc.sh

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DSAclean.py

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DSAextract.py

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findmisopt

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findoptdiff

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findsym.pl

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GenLibDeps.pl

Make GenLibDeps.pl more robust in the face of broken piping problems.

2008-10-04 18:03:46 +00:00

getsrcs.sh

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importNLT.pl

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llvm-native-gcc

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llvm-native-gxx

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llvm.grm

Update the LLVM polygen grammar for recent language changes:

2008-09-15 16:10:51 +00:00

llvmdo

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llvmgrep

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Makefile

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makellvm

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mkpatch

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NewNightlyTest.pl

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NightlyTest.gnuplot

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NightlyTestTemplate.html

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NLT.schema

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OldenDataRecover.pl

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parseNLT.pl

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plotNLT.pl

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profile.pl

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RegressionFinder.pl

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userloc.pl

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visit-violations

just a brain dump for a small tool

2008-08-28 23:15:28 +00:00

webNLT.pl

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