Duraid Madina 4560657b4c aCC and STLport complained about this, because they're like that ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22053 91177308-0d34-0410-b5e6-96231b3b80d8

2005-05-15 13:05:48 +00:00

..

SelectionDAG

Add some simplifications for MULH[SU]. This allows us to compile this:

2005-05-15 05:39:08 +00:00

AsmPrinter.cpp

aCC and STLport complained about this, because they're like that

2005-05-15 13:05:48 +00:00

BranchFolding.cpp

…

IntrinsicLowering.cpp

Fix lowering of ctlz, so now UnitTests/2005-05-11-Popcount-ffs-fls passes

2005-05-11 20:24:12 +00:00

LiveInterval.cpp

Print the symbolic register name in a register allocator debug dump.

2005-05-14 05:34:15 +00:00

LiveInterval.h

Print the symbolic register name in a register allocator debug dump.

2005-05-14 05:34:15 +00:00

LiveIntervalAnalysis.cpp

Print the symbolic register name in a register allocator debug dump.

2005-05-14 05:34:15 +00:00

LiveIntervalAnalysis.h

…

LiveVariables.cpp

allow a virtual register to be associated with live-in values.

2005-05-13 07:08:07 +00:00

MachineBasicBlock.cpp

…

MachineCodeEmitter.cpp

…

MachineFunction.cpp

print stack object alignment in -print-machineinstr dumps

2005-05-13 22:54:44 +00:00

MachineInstr.cpp

…

Makefile

…

Passes.cpp

…

PHIElimination.cpp

…

PhysRegTracker.h

…

PrologEpilogInserter.cpp

When inserting callee-save register reloads, make sure to skip over any

2005-05-15 03:09:58 +00:00

RegAllocIterativeScan.cpp

…

RegAllocLinearScan.cpp

…

RegAllocLocal.cpp

…

RegAllocSimple.cpp

…

TwoAddressInstructionPass.cpp

…

UnreachableBlockElim.cpp

…

VirtRegMap.cpp

…

VirtRegMap.h

…