Misha Brukman fd6b30ec89 Added the initial version of the TableGen description for the Sparc backend. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6021 91177308-0d34-0410-b5e6-96231b3b80d8		2003-05-07 21:52:39 +00:00
..
InstrSched
InstrSelection	Remove unneccesary &*	2003-04-23 16:36:11 +00:00
LiveVar
ModuloScheduling	Just some code beautification changes I had sitting around in my tree.	2003-04-22 23:00:08 +00:00
RegAlloc
EmitBytecodeToAssembly.cpp
MachineCodeForInstruction.h
MachineFunctionInfo.h
MachineInstrAnnot.h
Makefile
MappingInfo.cpp
MappingInfo.h
SparcV9.burg.in
SparcV9.td	Added the initial version of the TableGen description for the Sparc backend.	2003-05-07 21:52:39 +00:00
SparcV9AsmPrinter.cpp
SparcV9Instr.def
SparcV9InstrInfo.cpp	IntegerRegSize is always 8 for sparc	2003-04-26 19:44:35 +00:00
SparcV9InstrSelection.cpp	IntegerRegSize is always 8 for sparc	2003-04-26 19:44:35 +00:00
SparcV9InstrSelectionSupport.h
SparcV9Internals.h
SparcV9PeepholeOpts.cpp
SparcV9PreSelection.cpp	Eliminate use of NonCopyable so that doxygen documentation doesn't link	2003-05-01 20:28:45 +00:00
SparcV9PrologEpilogInserter.cpp
SparcV9RegClassInfo.cpp
SparcV9RegClassInfo.h
SparcV9RegInfo.cpp
SparcV9SchedInfo.cpp
SparcV9StackSlots.cpp
SparcV9TargetMachine.cpp	Remove two fields from TargetData which are target specific.	2003-04-26 20:11:09 +00:00