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llvm-6502/lib/Target/R600
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Tom Stellard 99eb040c02 R600: Add RV670 processor 
This is an R600 GPU with double support.

Reviewed-by: Christian König <christian.koenig@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178929 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-05 23:31:40 +00:00
..
InstPrinter
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MCTargetDesc
R600: Use a mask for offsets when encoding instructions
2013-04-04 14:00:09 +00:00
TargetInfo
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AMDGPU.h
R600: Add support for native control flow
2013-04-01 21:48:05 +00:00
AMDGPU.td
R600/SI: add proper formal parameter handling for SI
2013-03-07 09:03:52 +00:00
AMDGPUAsmPrinter.cpp
R600/SI: rework input interpolation v2
2013-03-07 09:04:14 +00:00
AMDGPUAsmPrinter.h
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AMDGPUCallingConv.td
R600/SI: add proper formal parameter handling for SI
2013-03-07 09:03:52 +00:00
AMDGPUConvertToISA.cpp
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AMDGPUFrameLowering.cpp
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AMDGPUFrameLowering.h
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AMDGPUIndirectAddressing.cpp
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AMDGPUInstrInfo.cpp
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AMDGPUInstrInfo.h
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AMDGPUInstrInfo.td
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AMDGPUInstructions.td
R600/SI: add float vector types
2013-03-18 11:34:10 +00:00
AMDGPUIntrinsics.td
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AMDGPUISelLowering.cpp
R600/SI: add mulhu/mulhs patterns
2013-03-27 09:12:51 +00:00
AMDGPUISelLowering.h
R600/SI: add proper formal parameter handling for SI
2013-03-07 09:03:52 +00:00
AMDGPUMachineFunction.cpp
R600/SI: Share code recording ShaderTypeAttribute between generations
2013-04-01 21:47:53 +00:00
AMDGPUMachineFunction.h
R600/SI: Share code recording ShaderTypeAttribute between generations
2013-04-01 21:47:53 +00:00
AMDGPUMCInstLower.cpp
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AMDGPUMCInstLower.h
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AMDGPURegisterInfo.cpp
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AMDGPURegisterInfo.h
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AMDGPURegisterInfo.td
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AMDGPUStructurizeCFG.cpp
R600: fix DenseMap with pointer key iteration in the structurizer
2013-03-26 10:24:20 +00:00
AMDGPUSubtarget.cpp
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AMDGPUSubtarget.h
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AMDGPUTargetMachine.cpp
R600: Add support for native control flow
2013-04-01 21:48:05 +00:00
AMDGPUTargetMachine.h
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AMDIL7XXDevice.cpp
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AMDIL7XXDevice.h
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AMDIL.h
R600/SI: remove SGPR address space v2
2013-03-07 09:03:59 +00:00
AMDILBase.td
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AMDILCFGStructurizer.cpp
R600: Fix JUMP handling so that MachineInstr verification can occur
2013-03-11 18:15:06 +00:00
AMDILDevice.cpp
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AMDILDevice.h
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AMDILDeviceInfo.cpp
R600/SI: Add processor types for each SI variant
2013-04-05 23:31:35 +00:00
AMDILDeviceInfo.h
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AMDILDevices.h
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AMDILEvergreenDevice.cpp
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AMDILEvergreenDevice.h
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AMDILInstrInfo.td
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AMDILIntrinsicInfo.cpp
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AMDILIntrinsicInfo.h
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AMDILIntrinsics.td
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AMDILISelDAGToDAG.cpp
R600: Factorize code handling Const Read Port limitation
2013-03-14 15:50:45 +00:00
AMDILISelLowering.cpp
R600/SI: add proper formal parameter handling for SI
2013-03-07 09:03:52 +00:00
AMDILNIDevice.cpp
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AMDILNIDevice.h
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AMDILPeepholeOptimizer.cpp
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AMDILRegisterInfo.td
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AMDILSIDevice.cpp
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AMDILSIDevice.h
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CMakeLists.txt
Target/R600: Fix CMake build to add missing files.
2013-04-01 22:05:58 +00:00
LLVMBuild.txt
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Makefile
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Processors.td
R600: Add RV670 processor
2013-04-05 23:31:40 +00:00
R600ControlFlowFinalizer.cpp
R600: Fix wrong address when substituting ENDIF
2013-04-04 14:00:03 +00:00
R600Defines.h
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R600EmitClauseMarkers.cpp
R600: Fix last ALU of a clause being emitted in a separate clause
2013-04-03 18:24:47 +00:00
R600ExpandSpecialInstrs.cpp
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R600InstrInfo.cpp
R600: Factorize maximum alu per clause in a single location
2013-04-03 16:49:34 +00:00
R600InstrInfo.h
R600: Factorize maximum alu per clause in a single location
2013-04-03 16:49:34 +00:00
R600Instructions.td
R600: Add support for native control flow
2013-04-01 21:48:05 +00:00
R600Intrinsics.td
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R600ISelLowering.cpp
R600/SI: add mulhu/mulhs patterns
2013-03-27 09:12:51 +00:00
R600ISelLowering.h
R600: Use legacy (0 * anything = 0) MUL instructions for pow intrinsics
2013-03-22 14:09:10 +00:00
R600MachineFunctionInfo.cpp
R600/SI: Share code recording ShaderTypeAttribute between generations
2013-04-01 21:47:53 +00:00
R600MachineFunctionInfo.h
R600/SI: Share code recording ShaderTypeAttribute between generations
2013-04-01 21:47:53 +00:00
R600MachineScheduler.cpp
R600: Factorize maximum alu per clause in a single location
2013-04-03 16:49:34 +00:00
R600MachineScheduler.h
R600: Factorize code handling Const Read Port limitation
2013-03-14 15:50:45 +00:00
R600RegisterInfo.cpp
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R600RegisterInfo.h
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R600RegisterInfo.td
R600: Emit CF_ALU and use true kcache register.
2013-04-01 21:47:42 +00:00
R600Schedule.td
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SIAnnotateControlFlow.cpp
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SIInsertWaits.cpp
R600/SI: fix inserting waits for all defines
2013-03-18 11:33:45 +00:00
SIInstrFormats.td
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SIInstrInfo.cpp
R600/SI: add cummuting of rev instructions
2013-03-27 09:12:59 +00:00
SIInstrInfo.h
R600/SI: add cummuting of rev instructions
2013-03-27 09:12:59 +00:00
SIInstrInfo.td
R600/SI: add cummuting of rev instructions
2013-03-27 09:12:59 +00:00
SIInstructions.td
R600/SI: add SETO/SETUO patterns
2013-03-27 15:27:31 +00:00
SIIntrinsics.td
R600/SI: mark most intrinsics as readnone v2
2013-03-26 14:03:57 +00:00
SIISelLowering.cpp
R600/SI: Avoid generating S_MOVs with 64-bit immediates v2
2013-04-05 23:31:20 +00:00
SIISelLowering.h
R600/SI: replace WQM intrinsic
2013-03-26 14:03:50 +00:00
SILowerControlFlow.cpp
R600/SI: replace WQM intrinsic
2013-03-26 14:03:50 +00:00
SIMachineFunctionInfo.cpp
R600/SI: Share code recording ShaderTypeAttribute between generations
2013-04-01 21:47:53 +00:00
SIMachineFunctionInfo.h
R600/SI: Share code recording ShaderTypeAttribute between generations
2013-04-01 21:47:53 +00:00
SIRegisterInfo.cpp
R600/SI: switch back to RegPressure scheduling
2013-03-26 14:04:02 +00:00
SIRegisterInfo.h
R600/SI: switch back to RegPressure scheduling
2013-03-26 14:04:02 +00:00
SIRegisterInfo.td
R600/SI: add float vector types
2013-03-18 11:34:10 +00:00
SISchedule.td
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