Chad Rosier 99f2d6fcc2 [AArch64] Unsized types don't specify an alignment. ...

PR20109

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212045 91177308-0d34-0410-b5e6-96231b3b80d8

2014-06-30 15:03:00 +00:00

..

AArch64

[AArch64] Unsized types don't specify an alignment.

2014-06-30 15:03:00 +00:00

ARM

Fix up scoping in a few tests (and delete one that validates unnecessary behavior).

2014-06-24 20:10:27 +00:00

CPP

IR: add "cmpxchg weak" variant to support permitted failure.

2014-06-13 14:24:07 +00:00

Generic

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Hexagon

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

Inputs

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Mips

Print a=b as an assignment.

2014-06-24 22:45:16 +00:00

MSP430

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

NVPTX

[NVPTX] Add reflect intrinsic (better than matching by function name)

2014-06-27 18:36:11 +00:00

PowerPC

[PowerPC] Constrain base register in PPCRegisterInfo::resolveFrameIndex

2014-06-27 13:04:12 +00:00

R600

Revert "Temporary hack to try cleaning extra .s file from bots."

2014-06-27 23:11:26 +00:00

SPARC

IR: add "cmpxchg weak" variant to support permitted failure.

2014-06-13 14:24:07 +00:00

SystemZ

IR: add "cmpxchg weak" variant to support permitted failure.

2014-06-13 14:24:07 +00:00

Thumb

ARM: Fix fastcc calling convention for Thumb1

2014-06-13 08:33:03 +00:00

Thumb2

ARM: Fix TPsoft for Thumb mode

2014-06-24 15:45:59 +00:00

X86

[x86] Fix a bug in the v8i16 shuffling exposed by the new splat-like

2014-06-28 05:46:28 +00:00

XCore

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00