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llvm-6502/test/CodeGen/ARM
History
Devang Patel 9ac743a4ee Add dominance check for the instruction being hoisted. 
For example, MachineLICM should not hoist a load that is not guaranteed to be executed.
Radar 10254254.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141569 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-10 19:09:20 +00:00
..
2006-11-10-CycleInDAG.ll
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2007-01-19-InfiniteLoop.ll
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2007-03-07-CombinerCrash.ll
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2007-03-13-InstrSched.ll
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2007-03-21-JoinIntervalsCrash.ll
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2007-03-27-RegScavengerAssert.ll
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2007-03-30-RegScavengerAssert.ll
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2007-04-02-RegScavengerAssert.ll
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2007-04-03-PEIBug.ll
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2007-04-03-UndefinedSymbol.ll
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2007-04-30-CombinerCrash.ll
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2007-05-03-BadPostIndexedLd.ll
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2007-05-07-tailmerge-1.ll
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2007-05-09-tailmerge-2.ll
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2007-05-14-InlineAsmCstCrash.ll
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2007-05-14-RegScavengerAssert.ll
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2007-05-22-tailmerge-3.ll
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2007-05-23-BadPreIndexedStore.ll
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2007-08-15-ReuseBug.ll
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2008-02-04-LocalRegAllocBug.ll
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2008-02-29-RegAllocLocal.ll
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2008-03-05-SxtInRegBug.ll
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2008-03-07-RegScavengerAssert.ll
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2008-04-04-ScavengerAssert.ll
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2008-04-10-ScavengerAssert.ll
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2008-04-11-PHIofImpDef.ll
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2008-05-19-LiveIntervalsBug.ll
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2008-05-19-ScavengerAssert.ll
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2008-07-17-Fdiv.ll
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2008-07-24-CodeGenPrepCrash.ll
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2008-08-07-AsmPrintBug.ll
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2008-09-17-CoalescerBug.ll
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2008-11-18-ScavengerAssert.ll
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2009-02-16-SpillerBug.ll
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2009-02-22-SoftenFloatVaArg.ll
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2009-02-27-SpillerBug.ll
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2009-03-07-SpillerBug.ll
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2009-03-09-AddrModeBug.ll
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2009-04-06-AsmModifier.ll
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2009-04-08-AggregateAddr.ll
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2009-04-08-FloatUndef.ll
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2009-04-08-FREM.ll
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2009-04-09-RegScavengerAsm.ll
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2009-05-05-DAGCombineBug.ll
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2009-05-07-RegAllocLocal.ll
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2009-05-11-CodePlacementCrash.ll
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2009-05-18-InlineAsmMem.ll
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2009-06-02-ISelCrash.ll
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2009-06-04-MissingLiveIn.ll
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2009-06-15-RegScavengerAssert.ll
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2009-06-19-RegScavengerAssert.ll
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2009-06-22-CoalescerBug.ll
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2009-06-30-RegScavengerAssert2.ll
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2009-06-30-RegScavengerAssert3.ll
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2009-06-30-RegScavengerAssert4.ll
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2009-06-30-RegScavengerAssert5.ll
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2009-06-30-RegScavengerAssert.ll
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2009-07-01-CommuteBug.ll
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2009-07-09-asm-p-constraint.ll
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2009-07-18-RewriterBug.ll
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2009-07-22-ScavengerAssert.ll
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2009-07-22-SchedulerAssert.ll
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2009-07-29-VFP3Registers.ll
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2009-08-02-RegScavengerAssert-Neon.ll
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2009-08-04-RegScavengerAssert-2.ll
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2009-08-04-RegScavengerAssert.ll
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2009-08-15-RegScavenger-EarlyClobber.ll
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2009-08-15-RegScavengerAssert.ll
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2009-08-21-PostRAKill2.ll
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2009-08-21-PostRAKill3.ll
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2009-08-21-PostRAKill.ll
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2009-08-23-linkerprivate.ll
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2009-08-26-ScalarToVector.ll
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2009-08-27-ScalarToVector.ll
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2009-08-29-ExtractEltf32.ll
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2009-08-29-TooLongSplat.ll
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2009-08-31-LSDA-Name.ll
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2009-08-31-TwoRegShuffle.ll
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2009-09-09-AllOnes.ll
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2009-09-09-fpcmp-ole.ll
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2009-09-10-postdec.ll
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2009-09-13-InvalidSubreg.ll
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2009-09-13-InvalidSuperReg.ll
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2009-09-20-LiveIntervalsBug.ll
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2009-09-21-LiveVariablesBug.ll
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2009-09-22-LiveVariablesBug.ll
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2009-09-23-LiveVariablesBug.ll
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2009-09-24-spill-align.ll
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2009-09-27-CoalescerBug.ll
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2009-09-28-LdStOptiBug.ll
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2009-10-02-NEONSubregsBug.ll
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2009-10-16-Scope.ll
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2009-10-21-InvalidFNeg.ll
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2009-10-27-double-align.ll
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2009-10-30.ll
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.
2011-07-07 03:55:05 +00:00
2009-11-01-NeonMoves.ll
Remove VMOVDneon and VMOVQ, which are just aliases for VORR. This continues to simplify the path towards an auto-generated disassembler.
2011-07-15 18:46:47 +00:00
2009-11-02-NegativeLane.ll
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2009-11-07-SubRegAsmPrinting.ll
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2009-11-13-CoalescerCrash.ll
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2009-11-13-ScavengerAssert2.ll
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2009-11-13-ScavengerAssert.ll
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2009-11-13-VRRewriterCrash.ll
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2009-11-30-LiveVariablesBug.ll
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2009-12-02-vtrn-undef.ll
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2010-03-04-eabi-fp-spill.ll
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2010-03-04-stm-undef-addr.ll
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2010-03-18-ldm-rtrn.ll
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2010-04-07-DbgValueOtherTargets.ll
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2010-04-09-NeonSelect.ll
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2010-04-13-v2f64SplitArg.ll
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2010-04-14-SplitVector.ll
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2010-04-15-ScavengerDebugValue.ll
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2010-05-14-IllegalType.ll
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2010-05-17-FastAllocCrash.ll
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2010-05-18-LocalAllocCrash.ll
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2010-05-18-PostIndexBug.ll
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2010-05-19-Shuffles.ll
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2010-05-20-NEONSpillCrash.ll
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2010-05-21-BuildVector.ll
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2010-06-11-vmovdrr-bitcast.ll
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2010-06-21-LdStMultipleBug.ll
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2010-06-21-nondarwin-tc.ll
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2010-06-25-Thumb2ITInvalidIterator.ll
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2010-06-29-PartialRedefFastAlloc.ll
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2010-06-29-SubregImpDefs.ll
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2010-07-26-GlobalMerge.ll
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2010-08-04-EHCrash.ll
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2010-08-04-StackVariable.ll
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2010-09-21-OptCmpBug.ll
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2010-09-29-mc-asm-header-test.ll
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2010-10-19-mc-elf-objheader.ll
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.
2011-07-07 03:55:05 +00:00
2010-10-25-ifcvt-ldm.ll
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2010-11-15-SpillEarlyClobber.ll
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2010-11-29-PrologueBug.ll
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2010-11-30-reloc-movt.ll
Print r_sym with the correct number of bits.
2011-08-04 14:48:27 +00:00
2010-12-07-PEIBug.ll
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2010-12-08-tpsoft.ll
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2010-12-15-elf-lcomm.ll
Don't drop alignment info on local common symbols.
2011-09-01 23:04:27 +00:00
2010-12-17-LocalStackSlotCrash.ll
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2011-01-19-MergedGlobalDbg.ll
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2011-02-04-AntidepMultidef.ll
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2011-02-07-AntidepClobber.ll
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2011-03-10-DAGCombineCrash.ll
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2011-03-15-LdStMultipleBug.ll
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2011-03-23-PeepholeBug.ll
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2011-04-07-schediv.ll
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2011-04-11-MachineLICMBug.ll
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2011-04-12-AlignBug.ll
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2011-04-12-FastRegAlloc.ll
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2011-04-15-AndVFlagPeepholeBug.ll
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2011-04-15-RegisterCmpPeephole.ll
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2011-04-26-SchedTweak.ll
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2011-04-27-IfCvtBug.ll
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2011-05-04-MultipleLandingPadSuccs.ll
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2011-06-09-TailCallByVal.ll
PR11004: Inline memcpy to avoid generating nested call sequence. Un-XFAIL 2011-06-09-TailCallByVal and 2010-11-04-BigByval
2011-09-26 06:13:20 +00:00
2011-06-16-TailCallByVal.ll
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2011-06-29-MergeGlobalsAlign.ll
In the ARM global merging pass, allow extraneous alignment specifiers. This pass
2011-06-29 22:24:25 +00:00
2011-07-10-GlobalMergeBug.ll
Add a missing test for r134882.
2011-07-11 08:35:17 +00:00
2011-08-02-MergedGlobalDbg.ll
Use byte offset, instead of element number, to access merged global.
2011-08-03 01:25:46 +00:00
2011-08-12-vmovqqqq-pseudo.ll
With the fix in r138164: "Add <imp-def> operands to QQ and QQQQ stack loads."
2011-08-20 00:34:45 +00:00
2011-08-25-ldmia_ret.ll
ARM fix for missing implicit operands on ldmia_ret.
2011-08-25 17:50:53 +00:00
2011-08-29-ldr_pre_imm.ll
Add testcase for r138746.
2011-08-29 18:02:40 +00:00
2011-08-29-SchedCycle.ll
Change ARM / Thumb2 addc / adde and subc / sube modeling to use physical
2011-08-30 01:34:54 +00:00
2011-09-09-OddVectorDivision.ll
Fix mistake in test runline.
2011-09-12 17:32:58 +00:00
2011-09-19-cpsr.ll
ARM isel bug fix for adds/subs operands.
2011-09-20 03:17:40 +00:00
2011-09-28-CMovCombineBug.ll
Tighten a ARM dag combine condition to avoid an identity transformation, which
2011-09-28 23:16:31 +00:00
addrmode.ll
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aliases.ll
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align.ll
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alloca.ll
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argaddr.ll
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arguments2.ll
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arguments3.ll
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arguments4.ll
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arguments5.ll
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arguments6.ll
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arguments7.ll
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arguments8.ll
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arguments_f64_backfill.ll
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arguments-nosplit-double.ll
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arguments-nosplit-i64.ll
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arguments.ll
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arm-and-tst-peephole.ll
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arm-asm.ll
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arm-frameaddr.ll
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arm-modifier.ll
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arm-negative-stride.ll
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arm-returnaddr.ll
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armv4.ll
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.
2011-07-07 03:55:05 +00:00
atomic-64bit.ll
Generic expansion for atomic load/store into cmpxchg/atomicrmw xchg; implements 64-bit atomic load/store for ARM.
2011-08-31 18:26:09 +00:00
atomic-cmp.ll
Convert more tests over to the new atomic instructions.
2011-09-26 20:27:49 +00:00
atomic-load-store.ll
Some additional tests for Thumb atomic load and store (which I somehow forgot to commit earlier).
2011-09-19 22:02:33 +00:00
atomic-op.ll
Convert more tests over to the new atomic instructions.
2011-09-26 20:27:49 +00:00
available_externally.ll
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avoid-cpsr-rmw.ll
Use regex to remove false dependencies on register allocation.
2011-08-19 23:10:31 +00:00
bfc.ll
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bfi.ll
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bfx.ll
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.
2011-07-07 03:55:05 +00:00
bic.ll
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bits.ll
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bswap-inline-asm.ll
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bx_fold.ll
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call_nolink.ll
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call-tc.ll
Reenable tail calls for iOS 5.0 and later.
2011-10-07 17:17:49 +00:00
call.ll
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.
2011-07-07 03:55:05 +00:00
carry.ll
Fix fall outs from my recent change on how carry bit is modeled during isel.
2011-09-06 18:52:20 +00:00
clz.ll
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code-placement.ll
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compare-call.ll
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constants.ll
Simplify printing of ARM shifted immediates.
2011-07-11 16:48:36 +00:00
crash-greedy-v6.ll
Fix a crash when building 177.mesa for armv6.
2011-07-18 18:47:13 +00:00
crash-greedy.ll
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crash-O0.ll
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crash.ll
Transfer implicit operands in NEONMoveFixPass.
2011-07-29 00:27:35 +00:00
cse-libcalls.ll
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ctors_dtors.ll
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ctz.ll
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debug-info-arg.ll
Directly point debug info to the stack slot of the arugment, instead of trying to keep track of vreg in which it the arugment is copied. The LiveDebugVariable can keep track of variable's ranges.
2011-09-08 22:59:09 +00:00
debug-info-blocks.ll
FastISel: avoid function calls between the materialization of the constant and its use.
2011-08-18 22:06:10 +00:00
debug-info-branch-folding.ll
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debug-info-d16-reg.ll
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debug-info-qreg.ll
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debug-info-s16-reg.ll
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debug-info-sreg2.ll
Do not use named md nodes to track variables that are completely optimized. This does not scale while doing LTO with debug info. New approach is to include list of variables in the subprogram info directly.
2011-08-19 23:28:12 +00:00
dg.exp
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div.ll
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divmod.ll
Reenable use of divmod compiler_rt functions for iOS 5.0 and later.
2011-10-07 16:59:21 +00:00
dyn-stackalloc.ll
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eh-resume-darwin.ll
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elf-lcomm-align.ll
Don't drop alignment info on local common symbols.
2011-09-01 23:04:27 +00:00
extloadi1.ll
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fabss.ll
Inflate register classes after coalescing.
2011-08-09 18:19:41 +00:00
fadds.ll
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fast-isel-crash2.ll
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fast-isel-crash.ll
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fast-isel-pred.ll
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fast-isel-redefinition.ll
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fast-isel-static.ll
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fast-isel.ll
ARM Darwin default relocation model is PIC.
2011-09-30 17:41:35 +00:00
fcopysign.ll
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fdivs.ll
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fixunsdfdi.ll
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flag-crash.ll
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fmacs.ll
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fmdrr-fmrrd.ll
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fmscs.ll
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fmuls.ll
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fnegs.ll
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fnmacs.ll
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fnmscs.ll
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fnmul.ll
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fnmuls.ll
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fold-const.ll
Add a testcase for r135123.
2011-07-14 06:23:09 +00:00
formal.ll
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fp16.ll
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fp_convert.ll
Inflate register classes after coalescing.
2011-08-09 18:19:41 +00:00
fp-arg-shuffle.ll
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fp.ll
Simplify printing of ARM shifted immediates.
2011-07-11 16:48:36 +00:00
fparith.ll
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fpcmp_ueq.ll
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fpcmp-opt.ll
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fpcmp.ll
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fpconsts.ll
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fpconv.ll
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fpmem.ll
Also match negative offsets for addrmode3 and addrmode5.
2011-09-23 22:10:33 +00:00
fpow.ll
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fpowi.ll
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fptoint.ll
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fsubs.ll
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global-merge.ll
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globals.ll
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.
2011-07-07 03:55:05 +00:00
hardfloat_neon.ll
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hello.ll
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.
2011-07-07 03:55:05 +00:00
hidden-vis-2.ll
ARM Darwin default relocation model is PIC.
2011-09-30 17:41:35 +00:00
hidden-vis-3.ll
ARM Darwin default relocation model is PIC.
2011-09-30 17:41:35 +00:00
hidden-vis.ll
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iabs.ll
Revert r141365. It was causing MultiSource/Benchmarks/MiBench/consumer-lame to
2011-10-10 18:27:30 +00:00
ifcvt1.ll
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.
2011-07-07 03:55:05 +00:00
ifcvt2.ll
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.
2011-07-07 03:55:05 +00:00
ifcvt3.ll
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.
2011-07-07 03:55:05 +00:00
ifcvt4.ll
Remove underscore that's breaking linux buildbots.
2011-08-03 23:13:01 +00:00
ifcvt5.ll
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ifcvt6.ll
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ifcvt7.ll
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ifcvt8.ll
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ifcvt9.ll
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ifcvt10.ll
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ifcvt11.ll
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illegal-vector-bitcast.ll
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imm.ll
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indirectbr.ll
Use MachineBranchProbabilityInfo in If-Conversion instead of its own heuristics.
2011-08-03 22:34:43 +00:00
inlineasm2.ll
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inlineasm3.ll
Add support for the 'Q' constraint.
2011-07-29 21:18:58 +00:00
inlineasm4.ll
Add support for the R and Q constraints.
2011-08-10 16:26:42 +00:00
inlineasm-imm-arm.ll
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inlineasm.ll
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insn-sched1.ll
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int-to-fp.ll
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intrinsics.ll
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ispositive.ll
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jumptable-label.ll
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large-stack.ll
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ldm.ll
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ldr_ext.ll
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ldr_frame.ll
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.
2011-07-07 03:55:05 +00:00
ldr_post.ll
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ldr_pre.ll
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ldr.ll
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ldrd.ll
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ldst-f32-2-i32.ll
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ldstrexd.ll
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load-global.ll
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load.ll
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long_shift.ll
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long-setcc.ll
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long.ll
Simplify printing of ARM shifted immediates.
2011-07-11 16:48:36 +00:00
lsr-code-insertion.ll
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lsr-on-unrolled-loops.ll
LSR: rewrite inner loops only.
2011-09-29 01:33:38 +00:00
lsr-scale-addr-mode.ll
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lsr-unfolded-offset.ll
Add dominance check for the instruction being hoisted.
2011-10-10 19:09:20 +00:00
machine-cse-cmp.ll
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machine-licm.ll
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mem.ll
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memcpy-inline.ll
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memfunc.ll
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mls.ll
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movt-movw-global.ll
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movt.ll
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mul_const.ll
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mul.ll
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mulhi.ll
Fix a bug introduced during refactoring a couple of months ago. Cortex-M3 does not support Thumb2 dsp instructions. rdar://10152911.
2011-09-20 21:38:18 +00:00
mult-alt-generic-arm.ll
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mvn.ll
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neon_arith1.ll
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neon_div.ll
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neon_ld1.ll
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neon_ld2.ll
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neon_minmax.ll
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neon_shift.ll
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pack.ll
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peephole-bitcast.ll
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phi.ll
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.
2011-07-07 03:55:05 +00:00
pr3502.ll
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prefetch.ll
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.
2011-07-07 03:55:05 +00:00
private.ll
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reg_sequence.ll
Remove VMOVDneon and VMOVQ, which are just aliases for VORR. This continues to simplify the path towards an auto-generated disassembler.
2011-07-15 18:46:47 +00:00
ret0.ll
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ret_arg1.ll
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ret_arg2.ll
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ret_arg3.ll
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ret_arg4.ll
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ret_arg5.ll
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ret_f32_arg2.ll
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ret_f32_arg5.ll
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ret_f64_arg2.ll
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ret_f64_arg_reg_split.ll
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ret_f64_arg_split.ll
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ret_f64_arg_stack.ll
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ret_i64_arg2.ll
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ret_i64_arg3.ll
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ret_i64_arg_split.ll
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ret_i128_arg2.ll
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ret_void.ll
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rev.ll
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sbfx.ll
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section.ll
FileCheck-ize and simplify RUN lines.
2011-07-02 20:43:11 +00:00
select_xform.ll
Simplify printing of ARM shifted immediates.
2011-07-11 16:48:36 +00:00
select-imm.ll
Improve codegen for select's:
2011-07-13 00:42:17 +00:00
select.ll
Fix SimplifySelectCC to add newly created nodes to the DAGCombiner
2011-09-22 23:01:29 +00:00
shifter_operand.ll
Remove a check from ARM shifted operand isel helper methods, which were blocking
2011-10-05 23:38:50 +00:00
shuffle.ll
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smul.ll
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spill-q.ll
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stack-frame.ll
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stm.ll
…
str_post.ll
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str_pre-2.ll
ARM push of a single register encodes as pre-indexed STR.
2011-08-11 18:07:11 +00:00
str_pre.ll
…
str_trunc.ll
…
sub.ll
Simplify printing of ARM shifted immediates.
2011-07-11 16:48:36 +00:00
subreg-remat.ll
Permit remat of partial register defs when it is safe.
2011-09-01 18:27:51 +00:00
sxt_rot.ll
FileCheck'ize test.
2011-07-26 20:49:44 +00:00
t2-imm.ll
…
tail-opts.ll
ARM Darwin default relocation model is PIC.
2011-09-30 17:41:35 +00:00
thread_pointer.ll
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thumb1-varalloc.ll
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tls1.ll
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tls2.ll
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tls3.ll
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trap.ll
…
trunc_ldr.ll
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truncstore-dag-combine.ll
Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests.
2011-07-07 03:55:05 +00:00
tst_teq.ll
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uint64tof64.ll
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umulo-32.ll
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unaligned_load_store.ll
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undef-sext.ll
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unord.ll
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uxt_rot.ll
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uxtb.ll
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va_arg.ll
Make this test less sensitive to codegen optimizations.
2011-10-05 18:13:08 +00:00
vaba.ll
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vabd.ll
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vabs.ll
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vadd.ll
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vargs_align.ll
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vargs.ll
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vbits.ll
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vbsl-constant.ll
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vbsl.ll
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vceq.ll
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vcge.ll
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vcgt.ll
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vcnt.ll
…
vcombine.ll
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vcvt_combine.ll
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vcvt.ll
…
vdiv_combine.ll
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vdup.ll
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vector-DAGCombine.ll
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vext.ll
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vfcmp.ll
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vfp.ll
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vget_lane.ll
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vhadd.ll
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vhsub.ll
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vicmp.ll
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vld1.ll
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vld2.ll
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vld3.ll
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vld4.ll
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vlddup.ll
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vldlane.ll
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vminmax.ll
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vmla.ll
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vmls.ll
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vmov.ll
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vmul.ll
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vneg.ll
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vpadal.ll
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vpadd.ll
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vpminmax.ll
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vqadd.ll
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vqdmul.ll
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vqshl.ll
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vqshrn.ll
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vqsub.ll
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vrec.ll
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vrev.ll
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vshift.ll
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vshiftins.ll
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vshl.ll
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vshll.ll
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vshrn.ll
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vsra.ll
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vst1.ll
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vst2.ll
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vst3.ll
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vst4.ll
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vstlane.ll
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vsub.ll
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vtbl.ll
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vtrn.ll
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vuzp.ll
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vzip.ll
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weak2.ll
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weak.ll
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