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9adb7ad457
* InstructionScheduling is now a real pass * InstrSched _uses_ LiveVar analysis, instead of creating it's own copy many times through a loop. In this was LiveVarAnalysis is actually even SHARED by Register allocation. * SchedPriorities is now passed the live var information in git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1700 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
InstrSched | ||
InstrSelection | ||
LiveVar | ||
RegAlloc | ||
MachineCodeForInstruction.h | ||
Makefile | ||
SparcV9.burg.in | ||
SparcV9AsmPrinter.cpp | ||
SparcV9Instr.def | ||
SparcV9InstrInfo.cpp | ||
SparcV9InstrSelection.cpp | ||
SparcV9InstrSelectionSupport.h | ||
SparcV9Internals.h | ||
SparcV9RegClassInfo.cpp | ||
SparcV9RegClassInfo.h | ||
SparcV9RegInfo.cpp | ||
SparcV9SchedInfo.cpp | ||
SparcV9TargetMachine.cpp |