Hal Finkel 9ae5b7a40a [PowerPC] Mark zext of a small scalar load as free ...

This initial implementation of PPCTargetLowering::isZExtFree marks as free
zexts of small scalar loads (that are not sign-extending). This callback is
used by SelectionDAGBuilder's RegsForValue::getCopyToRegs, and thus to
determine whether a zext or an anyext is used to lower illegally-typed PHIs.
Because later truncates of zero-extended values are nops, this allows for the
elimination of later unnecessary truncations.

Fixes the initial complaint associated with PR22120.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225584 91177308-0d34-0410-b5e6-96231b3b80d8

2015-01-10 08:21:59 +00:00

..

AArch64

Revert r225165 and r225169

2015-01-07 06:34:34 +00:00

ARM

Fix large stack alignment codegen for ARM and Thumb2 targets

2015-01-08 15:09:14 +00:00

CPP

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Generic

CodeGen: do not attempt to invalidate virtual registers for zero-sized phis.

2014-12-19 20:50:07 +00:00

Hexagon

[Hexagon] Adding dealloc_return encoding and absolute address stores.

2015-01-06 16:15:15 +00:00

Inputs

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Mips

[mips] Add support for accessing $gp as a named register.

2015-01-09 17:21:30 +00:00

MSP430

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NVPTX

[NVPTX] Fix bugs related to isSingleValueType

2014-12-17 17:59:04 +00:00

PowerPC

[PowerPC] Mark zext of a small scalar load as free

2015-01-10 08:21:59 +00:00

R600

R600/SI: Remove SIISelLowering::legalizeOperands()

2015-01-08 15:08:17 +00:00

SPARC

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SystemZ

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Thumb

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Thumb2

[ARM] Fix a bug in constant island pass that was triggering an assertion.

2015-01-08 20:44:50 +00:00

X86

[X86][SSE] Avoid vector byte shuffles with zero by using pshufb to create zeros

2015-01-09 22:03:19 +00:00

XCore

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