Chris Lattner 2224dcc88c Simplify this, matching changes in the tblgen emitter ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23909 91177308-0d34-0410-b5e6-96231b3b80d8

2005-10-23 22:34:25 +00:00

..

Alpha

Simplify this due to changes in the tblgen side

2005-10-23 22:33:22 +00:00

CBackend

fix CBackend/2005-09-27-VolatileFuncPtr.ll

2005-09-27 20:52:44 +00:00

IA64

Don't generate operations that aren't yet supported

2005-10-21 01:52:45 +00:00

PowerPC

Simplify this, matching changes in the tblgen emitter

2005-10-23 22:34:25 +00:00

Skeleton

CR registers are not used by this "target"

2005-09-30 06:43:58 +00:00

Sparc

This file is entirely ifdef'd out

2005-10-22 19:37:08 +00:00

SparcV8

This file is entirely ifdef'd out

2005-10-22 19:37:08 +00:00

SparcV9

This fixes PR638:

2005-10-19 20:07:15 +00:00

X86

add a note that Nate mentioned last week

2005-10-23 21:44:59 +00:00

Makefile

…

MRegisterInfo.cpp

Rename MRegisterDesc -> TargetRegisterDesc for consistency

2005-09-30 17:49:27 +00:00

SubtargetFeature.cpp

If a user requests help, give them help on both features and processors

2005-10-23 22:23:13 +00:00

Target.td

Plugin new subtarget backend into the build.

2005-10-21 19:05:19 +00:00

TargetData.cpp

Update to use the new MathExtras.h support for log2 computation.

2005-08-02 19:26:06 +00:00

TargetFrameInfo.cpp

Eliminate all remaining tabs and trailing spaces.

2005-07-27 06:12:32 +00:00

TargetInstrInfo.cpp

…

TargetMachine.cpp

Remove the X86 and PowerPC Simple instruction selectors; their time has

2005-08-18 23:53:15 +00:00

TargetMachineRegistry.cpp

1. Use SubtargetFeatures in llc/lli.

2005-09-01 21:38:21 +00:00

TargetSchedInfo.cpp

…

TargetSchedule.td

add a marker

2005-10-23 22:07:20 +00:00

TargetSelectionDAG.td

Use a literal to define ineg instead of immzero

2005-10-20 23:30:37 +00:00

TargetSubtarget.cpp

Eliminate all remaining tabs and trailing spaces.

2005-07-27 06:12:32 +00:00