llvm-6502/lib/Target
Chris Lattner 9c9183aef4 Eliminate some random whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21637 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-30 04:44:07 +00:00
..
Alpha Eliminate some random whitespace 2005-04-30 04:44:07 +00:00
CBackend
IA64 This target doesn't support the FSIN/FCOS/FSQRT nodes yet 2005-04-30 04:26:06 +00:00
PowerPC Doesn't support these nodes 2005-04-30 04:26:56 +00:00
Skeleton
Sparc
SparcV8
SparcV9 Updated dependence analyzer. Fixed numerous bugs. Same stage scheduling, etc. 2005-04-22 06:32:48 +00:00
X86 Add support for FSIN/FCOS when unsafe math ops are enabled. Patch contributed by 2005-04-30 04:25:35 +00:00
Makefile
MRegisterInfo.cpp
Target.td
TargetData.cpp
TargetFrameInfo.cpp
TargetInstrInfo.cpp
TargetMachine.cpp
TargetMachineRegistry.cpp
TargetSchedInfo.cpp