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d55697cf13
routines supporting machine code optimization. Also added method MachineInstrInfo::getNOPOpCode(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@3845 91177308-0d34-0410-b5e6-96231b3b80d8
103 lines
3.7 KiB
C++
103 lines
3.7 KiB
C++
//===-- llvm/Target/Machine.h - General Target Information -------*- C++ -*-==//
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//
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// This file describes the general parts of a Target machine.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TARGET_TARGETMACHINE_H
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#define LLVM_TARGET_TARGETMACHINE_H
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#include "llvm/Target/TargetData.h"
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#include "Support/NonCopyable.h"
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class MachineInstrInfo;
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class MachineInstrDescriptor;
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class MachineSchedInfo;
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class MachineRegInfo;
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class MachineFrameInfo;
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class MachineCacheInfo;
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class MachineOptInfo;
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class PassManager;
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class Pass;
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//---------------------------------------------------------------------------
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// class TargetMachine
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//
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// Purpose:
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// Primary interface to the complete machine description for the
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// target machine. All target-specific information should be
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// accessible through this interface.
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//
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//---------------------------------------------------------------------------
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class TargetMachine : public NonCopyableV {
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public:
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const std::string TargetName;
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const TargetData DataLayout; // Calculates type size & alignment
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int optSizeForSubWordData;
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int minMemOpWordSize;
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int maxAtomicMemOpWordSize;
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protected:
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TargetMachine(const std::string &targetname, // Can only create subclasses...
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unsigned char IntRegSize = 8,
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unsigned char PtrSize = 8, unsigned char PtrAl = 8,
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unsigned char DoubleAl = 8, unsigned char FloatAl = 4,
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unsigned char LongAl = 8, unsigned char IntAl = 4,
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unsigned char ShortAl = 2, unsigned char ByteAl = 1)
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: TargetName(targetname), DataLayout(targetname, IntRegSize,
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PtrSize, PtrAl,
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DoubleAl, FloatAl, LongAl, IntAl,
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ShortAl, ByteAl) { }
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public:
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virtual ~TargetMachine() {}
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//
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// Interfaces to the major aspects of target machine information:
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// -- Instruction opcode and operand information
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// -- Pipelines and scheduling information
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// -- Register information
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// -- Stack frame information
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// -- Cache hierarchy information
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// -- Machine-level optimization information (peephole only)
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//
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virtual const MachineInstrInfo& getInstrInfo() const = 0;
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virtual const MachineSchedInfo& getSchedInfo() const = 0;
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virtual const MachineRegInfo& getRegInfo() const = 0;
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virtual const MachineFrameInfo& getFrameInfo() const = 0;
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virtual const MachineCacheInfo& getCacheInfo() const = 0;
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virtual const MachineOptInfo& getOptInfo() const = 0;
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// Data storage information
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//
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virtual unsigned int findOptimalStorageSize (const Type* ty) const;
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// addPassesToEmitAssembly - Add passes to the specified pass manager to get
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// assembly langage code emited. Typically this will involve several steps of
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// code generation. This provides a default ordering of passes that could
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// be overridden for a particular target.
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//
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virtual void addPassesToEmitAssembly(PassManager &PM, std::ostream &Out);
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// getPrologEpilogCodeInserter - Create pass to insert prolog/epilog code.
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//
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virtual Pass* getPrologEpilogInsertionPass() = 0;
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// getFunctionAsmPrinterPass - Create a pass to write out the generated
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// machine code for a single function to the generated assembly file.
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//
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virtual Pass* getFunctionAsmPrinterPass(std::ostream &Out) = 0;
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// getModuleAsmPrinterPass - Create a pass to write out module-level
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// information to the generated assembly file.
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//
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virtual Pass* getModuleAsmPrinterPass(std::ostream &Out) = 0;
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// getEmitBytecodeToAsmPass - Create a pass to emit the final LLVM bytecode
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// to the generated assembly file.
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//
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virtual Pass* getEmitBytecodeToAsmPass(std::ostream &Out) = 0;
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};
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#endif
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