Bruno Cardoso Lopes 9d2fa87816 The Mips specific function for instruction cache invalidation cannot be
compiled on mips32r1 processors because it uses synci and rdhwr instructions
which are supported only on mips32r2, so I replaced this function with the
call to function cacheflush which works for both mips32r1 and mips32r2.
Patch by Sasa Stankovic

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141564 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-10 18:41:02 +00:00
..
2011-10-07 16:27:01 +00:00