Kevin Enderby e38070fc32 Added the B9.3.19 SUBS PC, LR, #imm (Thumb2) system instruction. ... While the .td entry is nice and all, it takes a pretty gross hack in ARMAsmParser::ParseInstruction() because of handling of other "subs" instructions to get it to match. Ran it by Jim Grosbach and he said it was about what he expected to make this work given the existing code. rdar://14214063 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187530 91177308-0d34-0410-b5e6-96231b3b80d8		2013-07-31 21:05:30 +00:00
..
Analysis
Assembler	Debug Info: enable verifier for testing cases.	2013-07-29 20:18:19 +00:00
Bindings/Ocaml
Bitcode
BugPoint
CodeGen	Revert "R600: Non vector only instruction can be scheduled on trans unit"	2013-07-31 20:43:27 +00:00
DebugInfo	Move file to X86 and add a triple to fix darwin bots for now.	2013-07-30 00:20:06 +00:00
ExecutionEngine
Feature
FileCheck
Instrumentation	Debug Info: update testing cases to pass verifier.	2013-07-29 18:12:58 +00:00
Integer
JitListener	Debug Info: update testing cases to pass verifier.	2013-07-29 18:12:58 +00:00
Linker
MC	Added the B9.3.19 SUBS PC, LR, #imm (Thumb2) system instruction.	2013-07-31 21:05:30 +00:00
Object	Add support for the 's' operation to llvm-ar.	2013-07-29 12:40:31 +00:00
Other
TableGen
tools
Transforms	Preserve fast-math flags when folding (fsub x, (fneg y)) to (fadd x, y).	2013-07-30 23:53:17 +00:00
Unit
Verifier	Reject bitcasts between address spaces with different sizes	2013-07-31 17:49:08 +00:00
YAMLParser
CMakeLists.txt
lit.cfg
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh