Tilmann Scheller cca1146119 ARM: Teach assembler to enforce constraints for ARM LDRD destination register operands. ... As specified in A8.8.72/A8.8.73/A8.8.74 in the ARM ARM, all variants of the ARM LDRD instruction have the following two constraints: LDRD<c> <Rt>, <Rt2>, ... (a) Rt must be even-numbered and not r14 (b) Rt2 must be R(t+1) If those two constraints are not met the result of executing the instruction will be unpredictable. Constraint (b) was already enforced, this commit adds support for constraint (a). Fixes rdar://14479793. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191520 91177308-0d34-0410-b5e6-96231b3b80d8		2013-09-27 13:28:17 +00:00
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AArch64	Initial support for Neon scalar instructions.	2013-09-24 02:47:27 +00:00
ARM	ARM: Teach assembler to enforce constraints for ARM LDRD destination register operands.	2013-09-27 13:28:17 +00:00
AsmParser	MCParser/Debug info: Accept line number 0 as a legitimate value, since	2013-09-26 23:37:11 +00:00
COFF	COFF: Ensure that objects produced by LLVM link with /safeseh	2013-09-17 23:18:05 +00:00
Disassembler	Fixing Intel format of the vshufpd instruction.	2013-09-27 01:44:23 +00:00
ELF	Implements parsing and emitting of .cfi_window_save in MC.	2013-09-26 14:49:40 +00:00
MachO	Fixed a crash in the integrated assembler for Mach-O when a symbol difference	2013-09-05 20:25:06 +00:00
Markup	MC: Simple example parser for MC assembly markup.	2012-10-31 23:24:13 +00:00
Mips	[mips][msa] Direct Object Emission for 3RF instructions.	2013-09-26 21:31:43 +00:00
PowerPC	PPC: Allow partial fills in writeNopData()	2013-09-26 09:18:48 +00:00
SystemZ	[SystemZ] Add unsigned compare-and-branch instructions	2013-09-18 09:56:40 +00:00
X86	Fixing Intel format of the vshufpd instruction.	2013-09-27 01:44:23 +00:00